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Design >> Mixed-Signal Design >> output of sigma-delta modulator
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Message started by liccams on Jun 18^th, 2007, 6:39pm

Title: output of sigma-delta modulator
Post by liccams on Jun 18^th, 2007, 6:39pm

Hi all:
I have a trouble in design the single bit fourth-order cascade(2-2) sigma-delta modulator.
the modulator output is: Out(z)=Y1(z)*H1(z)+a*Y1(z)*H1(z)*H2(z)+b*Y2(z)*H2(z),Y1(z) is the output of
the first two order,Y2(z) is the output of the second two order.the digital error cancelling logic was modeled by verilogA.the clock frequency of sampling is 26MHz.I do 4096 point of DFT,input signal frequency is 107.91KHz(m=17).
When I use spectre to do transient analysis and then do DFT analysis,the result is unstable.
for example:
if the DFT setup is from 1.935us to 159.467us, the SNR result is about 83dB.
but change the DFT setup from 1.935-T to 159.467-T(T is the clock period),the result is only about 40dB,the waveform in the low frequency region is very flat.
But if I use matlab to analysis the same output date,the result is stable in about 83dB.
I now fall in trouble deeply,I can't make decision which result I should trust in.cadence or matlab? or there
are some mistake I made? please help me! thank you very much.
forgive my poor English. :)

Title: Re: output of sigma-delta modulator
Post by panditabupesh on Jun 25^th, 2007, 5:46am

I suggest increase the number of points, and check whether you are seeing any harmonics in the psd plot. The SNR drop may be due to the harmonics (getting masked in some cases), and not necessarily due to the modulator being unstable.

Bupesh