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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> switch model https://designers-guide.org/forum/YaBB.pl?num=1183475404 Message started by morozmoroz on Jul 3rd, 2007, 8:10am |
Title: switch model Post by morozmoroz on Jul 3rd, 2007, 8:10am Hello, guys! :) I have such problem: I try to make instance of switch module in verilogA code like this: switch #(.vth(0.5)) sw1 (in,out, cp,cn); But when I run simulation Cadence just says me that parameter vth is not legal for swith. I have tried to find description of this module but found only in veriaref.pdf that vth is legal. So, could you help me with this - where I can find description of parameter for all possible basic includive modules? (and if possible - where are they in standart Cadence hierarchy?). Big thanks in advance, Denis. |
Title: Re: switch model Post by boe on Jul 3rd, 2007, 10:59am Hi Denis, morozmoroz wrote on Jul 3rd, 2007, 8:10am:
Which implementation of switch do you use? For your code to work, it must have a parameter vth... analogLib.switch, for example, does not have vth, but vt1 & vt2 (cf. CDF parameters of the cell). Hope this helps... BOE |
Title: Re: switch model Post by morozmoroz on Jul 4th, 2007, 12:25am Yes, I have tried and vt1, vt2 parameters too, but the error is the same. that's why i began to think that this switch is not from analogLib, may be it is from some internal directory of VerilogA compiler. I made like this because I found it in Ken book (The deigners guide to VerilogAMS) about resistor. But I have not found resistor name in analogLib, but in sample lib. So, now I am absolutely confused. Look forward to hear from anyone :) |
Title: Re: switch model Post by boe on Jul 5th, 2007, 2:23am Hi Denis, The cell "analogLib switch" (used in a schematic) is netlisted as "relay", so if you use (say) relay #(.vt1(0.5), .vt2(1)) sw1 (in,out, cp, cn); it simulates... I haven't checked the result though... BOE |
Title: Re: switch model Post by boe on Jul 5th, 2007, 5:24am morozmoroz wrote on Jul 4th, 2007, 12:25am:
"analogLib res" is netlisted to a Spectre "resistor", as "analogLib switch" is mapped to a Spectre "relay"... This is defined using CDF parameters. BOE |
Title: Re: switch model Post by morozmoroz on Jul 6th, 2007, 1:06am Thanks a lot, especially to boe. This forum is great :) |
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