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Design >> Analog Design >> Feedback loop simulation and Switched cap
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Message started by joeb on Jul 3rd, 2007, 9:44am

Title: Feedback loop simulation and Switched cap
Post by joeb on Jul 3rd, 2007, 9:44am

Hi,

How you check the stability of your amplifier in a switched cap configuration?

In case of gain boosting op amp, how you check the stability of ur overall amplifier.

How to use stb option in cadence? What stb does exactly?

Thanks for your answers.

Title: Re: Feedback loop simulation and Switched cap
Post by topquark on Jul 11th, 2007, 7:38am

Hope you already searched for some links on the topic.
here's one:
http://www.designers-guide.org/Forum/YaBB.pl?num=1156429424/0#0

A quicker 'n simpler way (which may not work always) to get a gain/phase margin plot is to break open the loop, put ideal volatge sources at appropriate nodes 'n do ac analysis sweeing freq.

Title: Re: Feedback loop simulation and Switched cap
Post by joeb on Jul 12th, 2007, 12:50am

Hi

Thanks for ur answer. I think that is the best one.

Title: Re: Feedback loop simulation and Switched cap
Post by Ken Kundert on Jul 12th, 2007, 11:04am

Never break the loop. Use stb analysis instead. It computes the loop gain, and then extracts the phase and gain margins from that. If your amplifier has switched-capacitor common-mode feedback, you will need to use pstb analysis.

-Ken

Title: Re: Feedback loop simulation and Switched cap
Post by tosei on Jul 14th, 2007, 9:31pm

hi,

To check for the op-amp stability I would replace the switched caps by the equivalent resistor value and IŽd analyze the stability by computing gain/phase margin (easy and fast).  You can either open the loop appropriately (be careful you are able to recreate the same DC loading conditions at the node you break the loop when you run your AC analysis!) or could run your stb analysis (which I do not like much since you never know exactly where the bias point is calculated).



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