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https://designers-guide.org/forum/YaBB.pl Design Languages >> VHDL-AMS >> buck power converter in vhdl ams https://designers-guide.org/forum/YaBB.pl?num=1183792598 Message started by piri on Jul 7th, 2007, 12:16am |
Title: buck power converter in vhdl ams Post by piri on Jul 7th, 2007, 12:16am Hi, i'm modelling a buck power converter in vhdl ams, i'm using two ideal switchs, but when i try to simulate it in cadence ams the simulation stops because the analog solver is unable to invert the matrix. if i simulate the same code with a different simulator (i.e. in SystemVision) i have no problem.... thanks |
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