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Design >> Mixed-Signal Design >> Feedforward topology for ΣD ADC
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Message started by tosei on Jul 16^th, 2007, 7:34pm

Title: Feedforward topology for ΣD ADC
Post by tosei on Jul 16^th, 2007, 7:34pm

Hi all,

Here is a basic question that I´m still asking myself: is there any real benefit in designing a 1-bit ΣD ADC using the feed-forward topology? I can see that using 1-bit Q the signal swing at Q´s input does not get reduced since the error can be as large as the full swing. Am I interpreting things in the correct way?

Many thanks
Tosei

Title: Re: Feedforward topology for ΣD ADC
Post by Berti on Jul 16^th, 2007, 10:37pm

Hello Tosei,

the idea is to reduce the signal swing at the output of the integrators (relaxes
specs on linearity of OTA gain etc.). The input of the quantizer is the most
uncritical node and a high signal swing there is usually not of concern.
However, I think the signal swing at the input of the quantizer cannot
be as large as the full swing assuming that proper scaling for dynamic-range
has been done.

Cheers

Title: Re: Feedforward topology for ΣD ADC
Post by tosei on Jul 17^th, 2007, 10:52am

Hi Berti,

Thanks for you answer. Relaxation on the OTAs' linearity is certainly a pro. What about stability? isn't it convenient to have less signal swing at a 1-bit quantizer input since it's gain is not well defined? In this case a feedforward topology would help guarantee better stability conditions. Is this correct?

Thanks again

Title: Re: Feedforward topology for ΣD ADC
Post by Berti on Jul 18^th, 2007, 12:19am

I am not completely sure, but I don't think that a high swing at you quantizer has an influence on stability, since you are free to scale the filter coefficients to reduce the swing (and the filter transfer function will remain the same). However, a high spread in filter coefficients might have an influence on the sensitivity of your loop filter.

In feed-back topologies the coefficients at the input are usually smaller and increase towards the quantizers while for the feed-forward structure it is the other way. But I don't think that this has a big influence on the signal swing before the quantizer because the overall loop gain is the same for both topologies. However, in overload the integrators will start clipping. When using a feedforward structure the feed-forward
path can help you to realize a kind of graceful degradation (last integrator clips, but forward-path still exists and will reduce you filter order by one, etc.)

Regards

Title: Re: Feedforward topology for ΣD ADC
Post by tosei on Jul 18^th, 2007, 5:43am

Hi Berti,

Thanks for your comments. You also brought up a good point concerning the way the system degrades during clipping. Clearly it looks like another advantage of the FF topology.

Thank you

Title: Re: Feedforward topology for ΣD ADC
Post by Berti on Jul 18^th, 2007, 6:39am

But be aware that people often use a passive summing network for the summing node before the quantizer in feed-forward structures. Then graceful degradation happens when the integrators overload. But I am not sure if this is still valid when you use active summing (with an amplifier), because the amplifier will saturate as well.

Regards