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Design >> Analog Design >> breakdown voltage
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Message started by nxing on Jul 23^rd, 2007, 2:45pm

Title: breakdown voltage
Post by nxing on Jul 23^rd, 2007, 2:45pm

Hi everybody,

I have one question regarding the breakdown voltage for CMOS, say if I am using a 0.18um device (with power supply 0.18v for VDD), can I have my Vgs (or Vgb) exceed 1.8V, for example, I have the DC bias at 1.5V and the input sin wave with Vamp=0.5v?

Thanks

Title: Re: breakdown voltage
Post by tosei on Jul 23^rd, 2007, 6:21pm

Hi nxing,

One concern regarding the gate voltage is with the gate-body oxide breakdown voltage. This is usually the one that breaks down first in standard CMOS processes. Depending on the oxide thickness this breakdown voltage might change its value. For reference, typically tox of about 1e-8m can have breakdown voltages of 5-7V.

Hope this helps.

tosei

Title: Re: breakdown voltage
Post by Berti on Jul 23^rd, 2007, 10:27pm

Hi nxing, tosei

I agree that the junction breakdown voltage is quite high (5-7V, maybe even more). Your vgb can therefore
be higher than 1.8V (but leakage will increase!).
But for the gate-source voltage it is more critical. For long-term reliability fabs often limit the supply voltage
tp +10% (<2V in your case). However, if you don't care about reliability the maximum vgs can be larger without
leading to unrecoverable failure for minimum gate length devices. Fabs specifiy this voltage to about +40% which
would be 2.5V for 0.18um. Any higher supply (dc) voltage will be on your own risk...

Regards