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Design >> Analog Design >> noise in current bias
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Message started by analog_cha on Jul 24^th, 2007, 10:53pm

Title: noise in current bias
Post by analog_cha on Jul 24^th, 2007, 10:53pm

Can any one explain what will happen if the transistor M29 is in linear region. If this is kept in linear region then output noise of the current is very little.
What is the impact if M29 is in linear region??

Thanks.

Title: Re: noise in current bias
Post by tosei on Jul 26^th, 2007, 7:09pm

Hi analog_cha,

This is a sef-biased beta multiplier circuit, whose goal (the one I know of at least) is to generate a quite constant bias current over temp. This is achieved with a positive temperature coefficient resistor which compensates for the negative temp coefficient of the NMOS threshold voltages. If M29 goes into the linear region:

1) The output impedance of your current mirror drops drastically --> your PSRR will be degraded and the noise being injected from the supply line will be superimposed to your bias current.

2) The tempco characteristics of your bias current will be affected, since the equation relating the overdrive voltage and the drain current is not longer parabolic (as in the case if M29 were saturated)

Regards
tosei

Title: Re: noise in current bias
Post by fehler on Aug 19^th, 2007, 7:03am

just a comment on noise:

the current bias is indeed a current amplifier, so when all transistors operating in sat. region, the bias core noise will be amplified by the current copier factor k. while M29 in triode region, maybe the core noise is reduced. just guess. I believe you can model it with a simple linear transfer function and you will find it.

analog_cha wrote on Jul 24^th, 2007, 10:53pm: