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Simulators >> Circuit Simulators >> Help with Spectre Analog Artist.
https://designers-guide.org/forum/YaBB.pl?num=1185901474

Message started by Mosieur_Oiso on Jul 31^st, 2007, 10:04am

Title: Help with Spectre Analog Artist.
Post by Mosieur_Oiso on Jul 31^st, 2007, 10:04am

Hello,
In Spectre Analog Artist, is it possible to use an expression from the "Outputs" panel (a voltage in the schematic for example) to set a variable in the "Design Variables" panel for use by a component in the same schematic?
I have a voltage V1 in the schematic, and I want an ideal resistor in my schematic to have the value R=k*V1. How could I do that? Can such an operation be done with equations, or does it have to be "wired" in the schematic?
Thanks

Title: Re: Help with Spectre Analog Artist.
Post by bernd on Aug 1^st, 2007, 1:20am

You need to define two design variables in the Analog Environment
k and V1, then you could directly enter tyhe expression k*V1 in the
resistance field of you ideal resistance.

I do not know if this really answers your question, because honestly
I haven't understood them quit well.

Bernd

Title: Re: Help with Spectre Analog Artist.
Post by Mosieur_Oiso on Aug 1^st, 2007, 3:16am

Hello bernd,
Thank you for your answer, but it's not exactly what I need.
Actually V1 is an output voltage of my simulation (not a source in the schematic): so I have this net called "V1" in my schematic, and I put it in the "Outputs" panel of Analog Artist by using the following menu sequence: Outputs->To Be Saved-> Select On Schematic...
Then, what I want to do is to define a variable called R=0.5*V1 in the "Design Variables" panel to be used as a value for an ideal resistor in the schematic.
The problem is that the simulation fails and request V1 to be set...
Thanks for help.

Title: Re: Help with Spectre Analog Artist.
Post by achim.graupner on Aug 1^st, 2007, 3:47am

Hi Oslo,

if I understood you problem right from my point of view it is not possible, as you want to perform one simulation, compute a result and run a second simulation afterwards. This is not supported by ADE. There are two possibilities:
1. use ocean-scripting, i.e. see http://www.designers-guide.org/Forum/YaBB.pl?num=1138202784
2. create a VerilogA-model of a voltage controlled resistor, setup a transient simulation with some clock to get the required voltage, switch the clock and provide to required resistance

Or do you just need a voltage controlled resistor? Then it is just a little VerilogA-scripting
like
I(node1, node2) <- V(node1, node2) / (R0 * V(control))

Regards,
Achim

Title: Re: Help with Spectre Analog Artist.
Post by Mosieur_Oiso on Aug 2^nd, 2007, 6:34am

Hi achim,
Looks like you're right. The only way I can do this is to use a voltage controlled resistor directly in the schematic.
Is there a "Verilog A for Dummies" manual that I can find somewhere? ::)
Thanks you,
Mosieur_Oiso

Title: Re: Help with Spectre Analog Artist.
Post by achim.graupner on Aug 2^nd, 2007, 10:28pm

Dear Oslo,

the Cadence VerilogA(MS)-Reference manual is not too bad, I myself used it as starting point and it still my only resource. Besides there is plenty of information on this website in the Verilog-AMS section, including plenty of code examples. Have a try, it is not that difficult.
Just one remark: it is extremly simple to write code which are not simulatable (the simulator will not converge). The most reason is one want to describe circuits that are just not feasible or too much simplified (you may remember your electrical engineering lectures, the series resistance of a voltage source can not always been neglected)

Have fun,
Achim

Title: Re: Help with Spectre Analog Artist.
Post by Andrew Beckett on Aug 27^th, 2007, 2:09pm

If it's a simple case, you can use expressions on resistors, capacitors or "bsource" components which reference voltages and currents (see "spectre -h bsource" for more details). Unfortunately you can't do this directly from a schematic - you'd need to define the component in an include file, since the ADE spectre netlister gets confused by the voltage references and thinks that you have additional design variables...

If you want a good guide to Verilog-A, then Ken and Olaf's book (see the Books link at the top of the page) is a great place to start.

Regards,

Andrew.