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Design >> Analog Design >> typical/worst/nominal corners of Parasitics
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Message started by skas20 on Aug 2^nd, 2007, 9:00pm

Title: typical/worst/nominal corners of Parasitics
Post by skas20 on Aug 2^nd, 2007, 9:00pm

Hi,

I have seen most of the time that any FAB, provides minimum three decks for parasitic extraction.
they are mostly typical,nominal and worst. (we receive different decks for all)

Could someone help me to understand what is the difference between them?
They differ in modelling of the parasitics? How do they model the difference?

Regards,
SK.

Title: Re: typical/worst/nominal corners of Parasitics
Post by ayowchen on Aug 4^th, 2007, 8:22am

Which foundry are you using? I don't find such corner cases in TSMC,SMIC...etc.

I think the difference is from the following variation.
1.) Metal thickness
2.) Dielectrics layer thickness

The rule deck can be generated by a field solver by the above specs.

Title: Re: typical/worst/nominal corners of Parasitics
Post by skas20 on Aug 11^th, 2007, 1:37am

Ok. Thanks.
I am using Samsung PDK. (It has these three decks.)

Do anybody have any material on HOW a parasitic extraction tool solves the 3D layers and comes with a netlist?

-- SK.