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Design Languages >> Verilog-AMS >> cross statement in example VCO in designers guide
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Message started by sylak on Aug 29^th, 2007, 3:41pm

Title: cross statement in example VCO in designers guide
Post by sylak on Aug 29^th, 2007, 3:41pm

In the VCO ( no jitter) given in the example section here in designers guide ...there is a cross statement with a phase+`M_PI/2

what does this cross statement do? I can understand if there is a '-'(minus ) in the place of '+'.

what is the condition here and how doesn this work ? isnt it always positive ?say phase is 0.6 or any other integer?

// identify the point where switching occurs
@(cross(phase + `M_PI/2, +1, ttol)...
...
...
...

Thanks

Title: Re: cross statement in example VCO in designers gu
Post by Geoffrey_Coram on Aug 31^st, 2007, 8:23am

phase isn't necessarily positive; the idtmod call shows it starting at -0.5 * 2 * `M_PI, which is -`M_PI:

phase = 2*`M_PI*idtmod(freq, 0.0, 1.0, -0.5);