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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Inductance extraction using Assura  
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Message started by AndreasAxholt on Sep 10th, 2007, 12:12am

Title: Inductance extraction using Assura  
Post by AndreasAxholt on Sep 10th, 2007, 12:12am

Hi!

I am currently creating a circuit operating at 24 GHz. At these freqs wires' self-inductances becomes very important.  

Has anybody investigated Assura's L/K extraction?
I did some initial comparison between Momentum and Assura and the result did not  match at all.

Any body who has came up with better matching results? How was these obtained?


Assuming that Assura L/K extraction does not work then I would like to manually include small wire-models.
This can be done by cutting a wire in half and creating pins for the wires.
I found that this is not the very best way of solving it and I would like to instantiate a
dummy instance in the layout which "cuts" the wire logically but not physically, so that when I send the chip to the fab I do not have to "fix" all my broken wires.

Any body has an idea of how to create this dummy instance? It should be as generic as possible (different wire metal layers, different metal widths...)

Thank you,

Andreas

   

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