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Message started by nxing on Sep 11th, 2007, 11:12am

Title: NF of Common_Gate LNA
Post by nxing on Sep 11th, 2007, 11:12am

I am going through some design equation of LNA NF calculation and found that for Common-Gate CMOS LNA, if the input resistance is matched with 1/gm, then the NF=1+gamma, independent of the load R (i.e. Gain of the amplifier), this is sort of contradict of my intuition, Is it really the case?

Thanks

Title: Re: NF of Common_Gate LNA
Post by aaron_do on Sep 17th, 2007, 8:55pm

I haven't really looked at it carefully but i would say the assumption is high voltage gain. i.e Rload >> 50.

Aaron

Title: Re: NF of Common_Gate LNA
Post by didac on Sep 18th, 2007, 11:53am

Hi,
I think that the assumption is that the majority of the noise comes from channel not from gate, check http://www.zen118213.zen.co.uk/RFIC_Circuits_Files/MOS_CG_LNA.pdf for a detailed derivation.
Hope it helps,

Title: Re: NF of Common_Gate LNA
Post by aaron_do on Sep 19th, 2007, 1:23am

Hi,

just thought i'd add that you actually have to AC ground the gate (large cap to ground) to get the 1 + gamma NF.

Aaron

Title: Re: NF of Common_Gate LNA
Post by carlgrace on Sep 19th, 2007, 6:31am

In the limit of large LNA gain, Rload is a second-order effect on the NF of the CG LNA.  The thermal noise of the load resistor, Rload ,is 4kTRload.  Referred to the input of the LNA it is:

          4kTRload                      4kT
irn =    --------           =          ---------
        (gmRload)^2               gm^2*Rload

so the total NF of the CG LNA including the load resistor is:

NF = 1 + GAMMA +           4kT
                                 -----------
                           gm^2*Rload*4kTRs

Since we choose Rs = gm for matching we can write:

NF = 1 + GAMMA +        1            =  1 + GAMMA + 1/Av, where Av = gm*Rload or the gain on the LNA.
                               -------
                             gm*Rload

If gm*Rload is high, then we get NF = 1 + GAMMA which is the standard equation.

Hope this helps,
Carl

Title: Re: NF of Common_Gate LNA
Post by didac on Sep 20th, 2007, 12:05pm

Hi,
Carl correct me if I'm wrong for your derivation I conclude that you basically apply Friis formula indirectly, I never seen in a noise analysis using MOS noise model or classic two port noise theory the inclusion of the load. For what I understand of F/NF the noise excess is generated by the device and the load for my understanding is not part of the device(i.e if you have a LNA followed by a Mixer I don't calculate the equivalent input noise from the mixer and put it in the input of the LNA).

Any comment will be appreciated,thank you very much.

Title: Re: NF of Common_Gate LNA
Post by nxing on Sep 20th, 2007, 5:01pm

Carl is correct. actually, I got the term of 1/gm*R and didn't find other people put it there (probably they just ignore it). That's why I raise this question.
For a LNA followed with a mixer, if the input of mixer is kind of resistor, I think you have to put this as load for LNA's noise analysis. Correct me if I am wrong.

Title: Re: NF of Common_Gate LNA
Post by didac on Sep 21st, 2007, 12:51am

Hi nxing,
I don't say that the result is wrong, I suppose the "discussion" comes from what you should consider part of the LNA and what not. For the resistance I read a paper of Hajimiri that considered it but it was part of an output ressonant inductor(was the loss of the inductor) and he takes under account for NF calculation because he consider the finite rds when the common assumption is that rds is infinite(which is false, but is the standard assumption). But also in this paper the CG LNA was the first stage of a multistage LNA and he didn't considered the following stage(which has a resistor for biasing) as a necessary part for NF calculation. As I said I suppose the bound is what you consider part of the LNA and what not.

Title: Re: NF of Common_Gate LNA
Post by nxing on Sep 21st, 2007, 9:27am

Hi didac,

Would you please tell me the name of the paper so that we can have a discussion on that?

Thanks

Title: Re: NF of Common_Gate LNA
Post by didac on Sep 21st, 2007, 9:36am

Hi,
The paper is http://www.chic.caltech.edu/Publications/ESSCIRC_Guan.pdf, "A 24 GHz CMOS front-end".

Title: Re: NF of Common_Gate LNA
Post by carlgrace on Sep 24th, 2007, 10:00am

Didac,

I would say the crux of the issue is that the concept of NF is pretty slippery when we are talking about circuits that are integrated.  This is because they are not usually terminated in 50 Ohms, and the definition of NF assumes a 50-ohm source.  

Typically, if you have an on-chip receiver you would have an LNA driving the mixer Gm stage.  The Gm stage is probably a CMOS common-source amp, so it doesn't resistively load the LNA.  In this case I would argue it makes sense to include the LNA load because it is put there expressly to develop voltage gain.  Here is philosophical question:  If you have a current mode receiver, and the output of the LNA is a current that is chopped with a passive mixer, how do you define the NF of the LNA?  It's a hard problem.

The Guan paper you posted is interesting.  In effect, he is modeling the output of the LNA as a voltage divider and claims the NF can go below 2.2 dB if RL --> infinity.  This is true, but in practice it is very hard to make RL much larger than rds in a given technology, particularly due to headroom constraints.  

Regards,
Carl

Title: Re: NF of Common_Gate LNA
Post by aaron_do on Sep 24th, 2007, 9:05pm

Has anybody checked the maths on that paper? It seems to suggest you should normally get an NF of below 2.2 dB for a long channel device. I noticed the model has a 1/(gm+gmb) resistance at the input. I think that is a simplified result which assumes rds is infinite...

Even if that equation is correct, the conclusion that F can be reduced without bound is a bit fishy. It is already known that F can be below 2.2 dB, but then the input resistance will be less than Rs (no matching). The author was actually talking about increasing current to reduce rds which is the exact opposite of what you'd want in an LNA. Sorry if i missed something out cos i didn't really study the paper too hard.

cheers,
Aaron

Title: Re: NF of Common_Gate LNA
Post by carlgrace on Sep 25th, 2007, 5:58am

Aaron,

You're spot on, mate.

It is a very "academic" result, let me put it that way.  You're exactly right that the noise is reduced by reducing rds, but only to the extent you can get the lost gain back by increase Rload without bound.  Also, you're correct about the input match.  The 1/gm rule-of-thumb for input resistance is only accurate if rds is big.  When rds is the same order of magnitude as 1/gm, the actual input match is closer to 1/gm in parallel with rds, which means the power consumption is going to shoot the moon here.  Also, the paper ignores a very practical consideration, linearity.  It is quite impossible to increase Rload without bound because with reduced rds, rds with dominate the output resistance.  When rds is small, its value changes significantly with output swing.  A changing output impedance equals distortion, which is not a good thing.

There is a reason people don't design common-gate LNAs like this.

Regards,
Carl

Title: Re: NF of Common_Gate LNA
Post by didac on Sep 26th, 2007, 10:45am

Hi,
I agree with both Aaron and Carl that the result is quite academic, but noise figure optimization
usually(at least what I know) don't have any constraint about gain and power, is the designer who must
provide constraints(like the power constraint method in Lee's book or the modification of inductor
and power constrained that takes into account a minimum value of inductor), in fact if you ever
see a representation of constant Noise and constant Gain in a Smith chart you will see that minimum
NF never(or barely) coincides with maximum gain,there is a trade-off in input matching between gain and NF. I think that this article should be viewed more like a proposal for new topologies that nothing else, after all is a multi-stage LNA the CG-LNA can be viewed more like a pre-LNA and the two following CS-LNA can be viewed like the parts that provide the actual gain.
On the other hand I agree with Carl that applying in IC design concepts initially developed for discrete applications
like NF is difficult. I also agree that if your operating as voltage amplifier not as transconductor the R that performs
the I-V conversion is part of your amplifier, what I don't consider part of the amplifier is the resistive part of the next stage.
For your question that how you can define NF in current mode I think that the correct definition deals with available
output power noise,i.e. you should look the output impedance of the block and put at the output the conjugate. For hand calculations I think that in Lee's book he proposes a method using only currents calculating short circuit currents at the output.
Thanks to all, great discussion.
Any comments are welcome.

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