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Design >> RF Design >> PORT vs VDC
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Message started by Faisal on Sep 24^th, 2007, 2:54am

Title: PORT vs VDC
Post by Faisal on Sep 24^th, 2007, 2:54am

Hi every body,

I am wondering about the difference between "PORT" vs normal "dc_source" with a resistor. In RF design, it seems there is a lot of usage of "PORTS". Why are they needed ? Any document from CADENCE which explains them?

I am a newbie in RF...so a detailed explaination would be quite helfpul

Kind Regards,
Fas

Title: Re: PORT vs VDC
Post by Stefan on Sep 24^th, 2007, 3:16am

Generally speaking a port IS the same as a series connection of voltage source and resistor.
The port however always assumes a matched connection to the circuit, and for this reason it is practical to be used in RF measurements (which are explained in the RF simulations manual).

In RF measures you'll always have to deal with matching in- and output ports, since factors like gain and noisefigures which are used for RF characterization vary with the load.

Title: Re: PORT vs VDC
Post by Ken Kundert on Sep 24^th, 2007, 8:20am

One other difference is a port assumes a matched load, so it internally doubles the voltage you specify before applying it to the source. So if you specify a 1V port, and leave it unloaded it will produce 2V.

-Ken