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Design >> High-Speed I/O Design >> Idle detector design for PCI-E-2.0
https://designers-guide.org/forum/YaBB.pl?num=1190729293

Message started by neoflash on Sep 25^th, 2007, 7:08am

Title: Idle detector design for PCI-E-2.0
Post by neoflash on Sep 25^th, 2007, 7:08am

There is certain requirement in PCIE-2.0 for SerDes to wake up from IDLE status by "hearing" signals from channel.

The threshold spec is so tight (<170mVppd enter IDLE and > 120mVppd to exit, reject 60mVppd noise) that simple rectifier doesn't seems to fit there. Any suggestion?