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https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> Help me review my PLL design https://designers-guide.org/forum/YaBB.pl?num=1190809056 Message started by wwwww12345 on Sep 26th, 2007, 5:17am |
Title: Help me review my PLL design Post by wwwww12345 on Sep 26th, 2007, 5:17am Hi all, I am asked to design a new PLL. I have read some papers and decided to do as follows: 1. Build the block of the PLL using Matlab or VerilogA . I donnot know these 2 tools well. Someone said Matlab is more quickly and intuitionistic, but it cannot include noise effect. Nevertheless I still tend to use matlab,for I can use matlab in other project after I study matlab. Later on, someone tell me that matlab can do noise simulation, the question lies in that the correct noise model. Who is wrong?Please recommend to me which tool is better and give me your comment, thank in advance. In either 2 tools , how can I insert the correct noise model to get the system response? 2. Once I got the parameters of each block, I can design the schematic in detail. I think this step may be easier compared to the 1st step. Am I right? Please help me to the right way,Thanks! |
Title: Re: Help me review my PLL design Post by Stefan on Sep 26th, 2007, 5:22am Yes, you can use both of the tools. To get started you should first read some books about PLL design techniques, there are lot's of them - just google and you'll find. They typically include the noise model they use as well, and - just to tell you... the second task is NOT easier than the first one :) |
Title: Re: Help me review my PLL design Post by wwwww12345 on Sep 27th, 2007, 3:35am Thank you , Stefan. I will use matlab first. And I will pay attention to circuit design too. |
Title: Re: Help me review my PLL design Post by loose-electron on Sep 27th, 2007, 1:13pm suggest going over to VerilogA or Vlog-AMS so that you will then have the models to do mixed level simulations with as the transistor level comes together. oddly enough, I design all the blocks first, and worry about the loop last, because the major players there are the charge pump current, Kvco, and filter |
Title: Re: Help me review my PLL design Post by wwwww12345 on Sep 28th, 2007, 4:34am Thank you! My first thought is using both these tools , but I have no enough time. hehe~~ |
Title: Re: Help me review my PLL design Post by venki_vlsi on Oct 2nd, 2007, 6:41pm Hi, I too was in same situation like u 2 months back whehter to use maltab or verilog-A for modelling High speed DAC. At last i used Matlab and did it good also.Now i am planning to port the same code in verilog-A with little modiifcations. For pll modelling its better to go for verilogA or AHDl if u knowledge of verilog or VHDL. cadence library has already pll models , check whether that satisifes ur requirements . i am attaching report .check it if it solves ur purpose. |
Title: Re: Help me review my PLL design Post by wwwww12345 on Oct 8th, 2007, 4:08am Thank you ! Venki! Your help is much appreciated! I have set up the PLL model in Matlab, the only nonideal effect left is VCO noise. I will turn to Verilog A soon. Thank you again! |
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