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Design >> Analog Design >> Post-Layout simulation using UMC 0.18um RF technol
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Message started by DoYouLinux on Sep 27^th, 2007, 12:28pm

Title: Post-Layout simulation using UMC 0.18um RF technol
Post by DoYouLinux on Sep 27^th, 2007, 12:28pm

Hi all,

Just would like to know that, has anyone been able to do a Post-Layout simulation in Cadence using a UMC 0.18mm RF technology ?

I have know from many friends that UMC don't provide a technology file to do a post-layout simulation, but I am not sure about this.

Thank you so much,

DYLinux

Title: Re: Post-Layout simulation using UMC 0.18um RF tec
Post by didac on Sep 27^th, 2007, 12:43pm

Hi DYLinux ,
I've been working all the past year with UMC 0.18um RF design kit and I can say that it's perfectly possible to perform post-layout simulation. Check your PDK documentation and if I remember well there's a section dedicated to ASSURA tool.
Hope it helps,

Title: Re: Post-Layout simulation using UMC 0.18um RF tec
Post by DoYouLinux on Sep 27^th, 2007, 12:55pm

Thanks a lot, Didac ;)

I will have a look with it and post a feedback about this again :)

DYLinux