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https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> thermal noise-flash adc https://designers-guide.org/forum/YaBB.pl?num=1191878217 Message started by cktlife on Oct 8th, 2007, 2:16pm |
Title: thermal noise-flash adc Post by cktlife on Oct 8th, 2007, 2:16pm Hi all, I am puzzled by the thermal noise requirement from the resistor string in a flash ADC. The resolution for a flash ADC is normally limited by the resistor matching. The offset voltage for comparators needs to be lower than 1LSB. Is there any requirement on the thermal noise from the resistor ladder? Is it KT/Cgs? In literature, it seems that this is never mentioned. Why is it so? Thanks, |
Title: Re: thermal noise-flash adc Post by carlgrace on Oct 8th, 2007, 3:10pm The thermal noise of the resistors has to be small enough that is doesn't limit performance. Since the resistors are usually small-valued (so they don't limit input bandwidth) the dominate noise requirement is due to kt/C if you are using a sampled-data flash, or the thermal noise of the input amp in the flash comparators if you aren't sampling with an explicit sampling cap. In that case the noise is both kT/Cgs and the thermal noise of the diff pair in the comparator. The thermal noise of the resistors is usually not mentioned because it is usually small enough to be neglected. Carl |
Title: Re: thermal noise-flash adc Post by tosei on Oct 8th, 2007, 7:44pm Hi cktlife, Both offset and noise will degrade the converterīs resolution. However, usually offset errors are much larger than thermal noise induced errors due to resistor sizing, as Carl suggested. KT/C noise might eventually be important depending on the C involved and obviously the temperature the circuit works at. If T is large enough, the noise effect might be comparable to the offset contribution to the resolution degradation. I would say the total noise power (within the converterīs bandwidth, and including the offset power) must be less than 1LSB if look for a more comprenhensive definition. Regards tosei |
Title: Re: thermal noise-flash adc Post by cktlife on Oct 9th, 2007, 2:40am Thanks for the reply. Carlgrace and Tosei. I did the following estimation. The thermal noise at the input of comparator is at much lower level than the resistor mismatch. The resistor matching can be as good as 1%, which is on 8bit resolution. Comparator with low offset (a few mV, 9-10bit accuracy) could have ~60fF gate cap in deep submicron technology. RMS thermal noise with 63fF cap is 250uV on 12bit level, assuming 1V swing. |
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