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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> BMAS07 paper remark https://designers-guide.org/forum/YaBB.pl?num=1193079317 Message started by Visjnoe on Oct 22nd, 2007, 11:55am |
Title: BMAS07 paper remark Post by Visjnoe on Oct 22nd, 2007, 11:55am Dear all, I've just read the paper/presentation from session 4.2 from BMAS 2007 (by Sabet & Riad). They model the output voltage saturation/limiting of a general analog output stage as follows (see listing 1 in their paper): Code:
Nothing is mentioned about potential problems/drawbacks using this approach. I have however used this in my first attempts to model an OTA (for use in a SC filter) and I noticed this kind of model introduces a discontinuity which can (does) lead to severe simulator convergence issues. At that time, I was using Eldo.Therefore, I would suggest to introduce some kind of 'smoothing' instead of this hard clipping. If you also experienced (simulation) problems with this kind of model, please comment. Regards Peter |
Title: Re: BMAS07 paper remark Post by Stefan on Oct 22nd, 2007, 1:18pm This is a well known drawback of this kind of implementation. You could try using a tanh - function (which would be the most common way, but slows down the simulation). Smoothing the output voltage using a transient statement is the other possibility, but limits the frequency response of the block. |
Title: Re: BMAS07 paper remark Post by Ken Kundert on Oct 22nd, 2007, 2:55pm Its funny, but I have used this type of construct a great deal, and have had little to no difficulty with it. I find that as long as you are working with ground referred functional models, and the feedback is not too tight, they work fine. Maybe you can give us some context, maybe give the whole model rather than just a fragment, and describe the surrounding environment. -Ken |
Title: Re: BMAS07 paper remark Post by Visjnoe on Oct 23rd, 2007, 12:53am Dear Stefan, Ken, As mentioned by Stefan, I indeed used the tanh() as a smoothing function to replace the abrupt discontinuity introduced by the if...then...else statement. I don't have access anymore to those files (SC filter), but I guess I could make some sort of comparable model + circuit pretty fast. I will however use a different simulator (HSPICE). I'm also not excluding the possibility that Spectre shows no convergence problems with this approach and HSPICE/Eldo do...that in itself would be interesting to find out. At that time, the non-convergence seemed 'logical' to me, given the strong discontinuity introduced by the model. At first, I used a simple VCVS with clipping. I than thought the non-convergence was related to the zero output impedance. However, introducing it dit not help. That led me back to the 'hard clipping' as a cause. Maybe it's important to notice this was noticed during transient analysis (no AC was run). Regards Peter |
Title: Re: BMAS07 paper remark Post by Visjnoe on Oct 23rd, 2007, 8:57am Dear all, as a first experiment, I set up a simple transient simulation using a simple OTA model (SPICE primitives) which has strong clipping. The SPICE deck includes 2 OTA configurations , 1 being an inverting amplifier and 1 being a unity-gain buffer (first one commented out). I could not get convergence issues (this would support Ken's statement). It was simulated using HSPICE v2007.03. The next experiment I suggest is to use this OTA model in a SC amplifier circuit. This is the SPICE netlist: Code:
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Title: Re: BMAS07 paper remark Post by Geoffrey_Coram on Oct 23rd, 2007, 9:05am I might also expect convergence difficulties from the original model when the initial condition starts the model out in a flat region (<Vlim1 or > Vlim2), because Newton's method will not know (from the linearization) which way to move the input voltage. Some simulators may insert a GMIN term that could help. |
Title: Re: BMAS07 paper remark Post by Visjnoe on Oct 23rd, 2007, 10:58am Dear all, I just remember from my past experience (the SC filter) that this filter had auto-zero/correlated double sampling. During a small period of time, the OTA was in open loop (between the 2 non-overlapping clock phases). I'm wondering right now if this was not the root cause of the non-convergence, rather than the 'hard clipping'? On the other hand, you can easily build up a reasoning where clipping will in fact help convergence. Otherwise, the simulator would try to solve for the voltage on the output node with the given set of reltol and vntol which would (most likely) be way too stringent for the very high output voltages (e.g. 10kV) that would be generated for an open-loop OTA without clipping. What triggered me in thinking in this direction, was the fact that in the examples I posted the OTA is used in a closed loop configuration. It's just a thought, I don't have any serious backup on this right now. Kind Regards Peter |
Title: Re: BMAS07 paper remark Post by Visjnoe on Oct 25th, 2007, 12:01pm Dear all, I have also used the above (simple) OTA macro-model in a SC amplifier and I did not get convergence issues (HSPICE v2007.03 was the simulator I used). Therefore, at the moment I don't seem to be able to provide an example which illustrates the non-convergence related to using this kind of model, although I'm almost 100% percent sure I experienced this in the past (note: using a different simulator, being Eldo). If someone (who has encountered this non-convergence also) can provide a 'working example', that would be a very good input for this discussion. Kind Regards Peter |
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