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Design >> Analog Design >> a Thonmas.Lee's practice about currrent refe
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Message started by xwj623 on Nov 8^th, 2007, 8:24pm

Title: a Thonmas.Lee's practice about currrent refe
Post by xwj623 on Nov 8^th, 2007, 8:24pm

as the attached draw, schematic A is very convertional and can find in many papers and books.
i have discussed with some people and make a conclusion that schematic B does't work. For the loop is a postive feedback loop,and the loop gain may be greater than 1. While in schematic A, the loop gain is smaller than 1.
So i think that the schematic A will work , while B does't.

But in Thonmas H.Lee 's "Design of CMOS RFIC (2ed edition)", a practice in Chapter 10, which is also the last practice, He said
that both A and B will either work or does't work at the same time. He said this had been proved.

I can't understand. Help me.

Thanks.

Title: Re: a Thonmas.Lee's practice about currrent
Post by bananawolf on Nov 16^th, 2007, 7:12pm

My understanding for this is in the constant gm circuit in Fig.A, if the resistor is off-chip and has a pretty large capacitor in parallel with it, it is still possible for the bias circuit to oscillate although the DC loop gain is below unity. you can verify this by simulations.
Adding a lot of de-coupling capacitors in this circuits could solve this problem.

Title: Re: a Thonmas.Lee's practice about currrent refe
Post by jimwest on Nov 19^th, 2007, 6:47pm

In fact, there is also a positive feedback loop in Fig.1.
To stablize the circuit, you have to make the negative loop factor larger than the positive one.

Title: Re: a Thonmas.Lee's practice about currrent refe
Post by jeffyan on Nov 22^nd, 2007, 3:20am

jimwest wrote on Nov 19^th, 2007, 6:47pm:

In fact, there is also a positive feedback loop in Fig.1.
To stablize the circuit, you have to make the negative loop factor larger than the positive one.

hi
then where is the negative feedback loop ? :)
thanks.
jeff yan

Title: Re: a Thonmas.Lee's practice about currrent
Post by bananawolf on Nov 25^th, 2007, 2:22pm

nowhere

Title: Re: a Thonmas.Lee's practice about currrent refe
Post by jimwest on Nov 28^th, 2007, 7:06pm

Hi,
The source degeneration is a negative feedback.
The negative feedback is independant on the other loops, or we cannot seperate the multiple feedback loop circuit.

Kinda Regards,

Jim

Title: Re: a Thonmas.Lee's practice about currrent
Post by toseii on Dec 22^nd, 2007, 8:41pm

Hi,

Jim is right. A simple way to look at the negative feedback action of the degen resistor is as follows:

If there is a small increase in the current flowing thru the degen resistor, that will generate a small decrease on the VGS of the corresponding NMOS transistor. Therefore that will force - by means of the positive feedback which comprises the PMOS current mirror, a decrease on the current flowing thru the resistor, which will counterbalance the first increase on such current.

Both loops have positive and negative feedback, and as Jim stated, you have to guarantee the negative feedback loop having more gain than the positive loop.

Hope this helps
tosei