The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Modeling >> Behavioral Models >> Verilog_A modeling
https://designers-guide.org/forum/YaBB.pl?num=1195548667

Message started by qinshijie on Nov 20^th, 2007, 12:51am

Title: Verilog_A modeling
Post by qinshijie on Nov 20^th, 2007, 12:51am

how to describe an module consisting of both analog submodules and digital submodules with Verilog_A language,or both Verilog_A and Verilog HDL language?

Title: Re: Verilog_A modeling
Post by ACWWong on Nov 20^th, 2007, 2:08am

You should use verilogAMS.
Try this website to get started... http://www.designers-guide.org/VerilogAMS/

Title: Re: Verilog_A modeling
Post by qinshijie on Nov 20^th, 2007, 6:45pm

thank you for your suggestion,ACWWang!