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Design >> RF Design >> LNA input impedance
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Message started by nxing on Dec 18^th, 2007, 11:54am

Title: LNA input impedance
Post by nxing on Dec 18^th, 2007, 11:54am

Hello everybody,

I have a CMOS LNA and the topology is the classic cascode architecture with inductor degeneration at source of input device. what I find is that I can see a negative Z11 (real part) after the S-parameter analysis. Have anybody met the same problem? how come the real part become the negative? what's the physical meaning?

Thanks !

BTW, this is with 65nm technology.

nxing

Title: Re: LNA input impedance
Post by didac on Dec 19^th, 2007, 3:01am

Hi nxing,
I think that the problem arises from the parasitic capacitance (maybe csb) that contributes as a negative real part in the input impedance. I think that you will need to increase the value of the degeneration inductance to compensate it or you maybe will face an unstability problem.
Hope it helps,

Title: Re: LNA input impedance
Post by nxing on Dec 19^th, 2007, 11:28am

Hi Didac,

Thanks for the reply. Actually, what I found is that the Cgs of this technology is very small. So what I do is to put a C parallel with Cgs to slow it down. I didn't see other people use this technique. So far the simulation goes quite well, just not sure there are any drawback for this design or any potential problem.

Regards,

nxing

Title: Re: LNA input impedance
Post by didac on Dec 20^th, 2007, 12:56am

Hi nxing,
I've seen this technique before,in fact we had a LNA manufactured and measured with this C, but we didn't encounter any negative impedance problem. Have you checked the two stability factors, not only in your band of interest but for a wide bandwidth?
Hope it helps,

Title: Re: LNA input impedance
Post by noiseless on Feb 25^th, 2008, 9:50pm

I encounted the same thing. The s11 is within the unit circle, however, real part of Z11 is negative. How it comes? anyone can give explain?

Title: Re: LNA input impedance
Post by Frank Wiedmann on Feb 26^th, 2008, 12:24am

S11 corresponds to the input impedance when the other port(s) is/are terminated with the reference impedance (usually 50 Ω). Z11 is the input impedance when the other port(s) is/are open.

Title: Re: LNA input impedance
Post by northfish on Apr 7^th, 2008, 2:28pm

I think adding an extra capacitor in parallel with Cgs would decrease your LNA gain, since the Q of the input network is decreased.

By the way, I don't quite understand why the real part of the Z11 could be negative. My thinking is that probably you got a small capacitance in series with Ls, and at the operating frequency the small cap negated out your degeneration inductance and made the real part of Z11 negative.

northfish