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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> Modeling DDS/DAC modulator https://designers-guide.org/forum/YaBB.pl?num=1201457595 Message started by Faisal on Jan 27th, 2008, 10:13am |
Title: Modeling DDS/DAC modulator Post by Faisal on Jan 27th, 2008, 10:13am Hi, I am trying to model a DDS/DAC and quadrature modulator in Spectre-RF? Is it possible to model this in Spectre-RF? My concern is that DDS/DAC requires transient simulations and modulator will require Spectre-RF? Any ideas on how to do this ? |
Title: Re: Modeling DDS/DAC modulator Post by Stefan on Jan 27th, 2008, 12:02pm If you write good enough behavioral models, the modulator won't require spectreRF (however, some measurements might be faster with spectre RF). |
Title: Re: Modeling DDS/DAC modulator Post by Faisal on Jan 30th, 2008, 1:25pm Hi Stefan, Thanks for the response. What do you think would be a better tool for system level exploration? Matlab, Spectre, ADS.. any suggestions? |
Title: Re: Modeling DDS/DAC modulator Post by Stefan on Jan 30th, 2008, 3:26pm That strongly depends on what you're trying to do. If you want system simulations that can be simulated together with transistor level parts - use VerilogAMS. For pure system level simulations with much IP reuse like modulated signals and so on - use Matlab. I personally dislike ADS, but that's my own oppinion. It all depends on how good you are writing models and how much control over your model's behaiour you desire... |
Title: Re: Modeling DDS/DAC modulator Post by Faisal on Feb 6th, 2008, 6:52am Hi Stefan, Thanks once again !! I would also prefer using SpectreRF, I can model my modulator quite easily. I have the following issues 1) How to model an accumulator in SpectreRF .. I need a go-around for the hidden state problem, 2) I am not clear if we can mix Verilog-AMS with SpectreRF? |
Title: Re: Modeling DDS/DAC modulator Post by Stefan on Feb 6th, 2008, 6:56am spectreRF is not a language, it's a simulator. "Hidden state" is a phenomenom that occurs during periodic steady state analysis. An accumulator behaves like a capacity ... that should be no problem to model. However I thought we were talking about MIXED SIGNAL simulations. And no, you can't use the Verilog-AMS language with the spectreRF simulator. (just verilogA with respect to hidden states) |
Title: Re: Modeling DDS/DAC modulator Post by Faisal on Feb 6th, 2008, 7:19am Yes you are right about SpectreRF that its a simulator : I use the language/Simulator interchangeably, this is misleading.... . If I say count = count + 1 in VerilogA and run PSS analysis in SpectreRF, I sometimes get an error from the SpectreRF complaining about the hidden state. For some modules that I have from Cadence rflib, I see similar modeling.. but they dont run into problems |
Title: Re: Modeling DDS/DAC modulator Post by Faisal on Feb 6th, 2008, 7:27am module try(out_sin); output out_sin; electrical out_sin; real count, period, cos_angle; analog begin @(initial_step("static") or initial_step("pss") ) begin count = 0; period = 1 / 10M ; end @(timer(period/10, period)) begin count = count + 1; end V(out_sin) <+ cos(2*3.14*1M*count); end endmodule |
Title: Re: Modeling DDS/DAC modulator Post by Geoffrey_Coram on Feb 12th, 2008, 6:41am Faisal wrote on Feb 6th, 2008, 7:19am:
I think Cadence provides some attribute ("instrumentation_module" ?) to disable the warning. |
Title: Re: Modeling DDS/DAC modulator Post by Frank Wiedmann on Feb 12th, 2008, 7:09am Geoffrey_Coram wrote on Feb 12th, 2008, 6:41am:
It's (* instrument_module *) in front of the module name, see http://sourcelink.cadence.com/docs/db/kdb/2005/July/11187476.html. |
Title: Re: Modeling DDS/DAC modulator Post by Faisal on Mar 3rd, 2008, 1:40pm Thank you Geoffrey and Frank for your replies. It was helpful in understanding |
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