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Design >> Mixed-Signal Design >> OTA open loop gain for 1.2V supply
https://designers-guide.org/forum/YaBB.pl?num=1201696685

Message started by cktlife on Jan 30^th, 2008, 4:38am

Title: OTA open loop gain for 1.2V supply
Post by cktlife on Jan 30^th, 2008, 4:38am

HI all,

I am new to OTA design. Recently I designed a two stage OTA with 65nm technology. First stage is folded cascode and second stage is differential amplifier with active load. The open loop gain is 900 at maximum with 250MHz unit gain bandwidth. I wonder how much open loop gain can be achieved for low voltage process with about 300MHz unit gain frequency. Let's say two stage topology without gain boosting. Thanks for your comments.

Title: Re: OTA open loop gain for 1.2V supply
Post by Berti on Jan 31^st, 2008, 11:59pm

Hi,

I think you should also specify the capacitive load you design the OTA for.
Furhtermore, you should also write what kind of transistors you use. Sometimes the technology provides non-implant-processed transistors which results in much higher
gain.

Regards

Title: Re: OTA open loop gain for 1.2V supply
Post by loose-electron on Feb 1^st, 2008, 5:11pm

Why would you need to maximize the gain?
Generally 80 db is more than enough for most closed loop applications.

Title: Re: OTA open loop gain for 1.2V supply
Post by cktlife on Feb 2^nd, 2008, 4:55am

Hi all,

Thanks for the reply. It is standard CMOS 65nm low voltage process. The load is 3pF. I wonder if three stage topology is necessary to achieve 80dB gain.

Title: Re: OTA open loop gain for 1.2V supply
Post by Berti on Feb 4^th, 2008, 4:52am

In generall, I think when you achieved 60dB @UBGW=250MHz it should also be possible to get 60dB @UGBW=350MHz.
80dB gain might be difficult to achieve ... but Jerry's question is justified: do you really need that?