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Design >> RF Design >> RF voltage amplifier
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Message started by mobil on Feb 13^th, 2008, 8:00pm

Title: RF voltage amplifier
Post by mobil on Feb 13^th, 2008, 8:00pm

Hi all,

Recently I met an interesting question for high-frequency PLL design. In the design, a CML frequency divider is connected to the VCO, which is running at millimeter-wave frequencies. We wanted a buffer to connect VCO and the divider. But at this high frequency, it's not easy to design a buffer such as source-follower or differential amplifier as the analog design. We then decide to use the RF power amplifier (PA) design method, but here is the problem:

The PA design is concerned about matching network(usually 50 Ohm) both input and output. But imaging the VCO's load is a 50 Ohm matching network, this will totally disable the VCO at that high frequencies. Meanwhile, a large voltage swing is needed to drive the divider, which means the input impedance of the divider should be as large as possible (>> 50 Ohm).

Above all, what we need is a RF OP-amp which has large input impedance, small output impedance and can amplify the VCO's voltage swing. I checked lots of references but can't find the topic about the RF voltage amplifier design.

Doesn't anyone have an idea or any comments? Thanks

Title: Re: RF voltage amplifier
Post by doho on Feb 14^th, 2008, 10:59am

What is the problem with a source follower?

Title: Re: RF voltage amplifier
Post by mobil on Feb 14^th, 2008, 2:04pm

Thanks for your reply.

Well, a conventional analogy design for source-follower will lead high loss
and low voltage swing in the high-frequency region. Especially when inductor introducing to resonate, the design of high voltage gain buffer will be complicated.

Title: Re: RF voltage amplifier
Post by loose-electron on Feb 18^th, 2008, 4:04pm

At HF situations, a CMOS source follower often does nopt get you much buffering. An emitter follower (BiCMOS, or SiGe) can often get you some good buffering, if you have that option.

If it is purely CMOS, suggest lowerin gth impedance of the driving stage to the point where it can drive the next stage.

Classic RF power amps are often multistage (three stage is common in GaAs) where the geometry is progressively staged (along with current and signal amplitude) to get to the desired power level.

-- Jerry

Title: Re: RF voltage amplifier
Post by mobil on Apr 3^rd, 2008, 10:25pm

Hi,

For someone is still interested in this topic, I've found a paper about the output buffer.
It's definitely different from design of power amplifier, because the output of VCO is always
a large signal. Using CML structure is a good way of handling this problem.

Goodluck for everyone.

Title: Re: RF voltage amplifier
Post by email_gz on Apr 3^rd, 2008, 11:42pm

mobil wrote on Feb 13^th, 2008, 8:00pm:

Hi:
If you want to a buffer between VCO and CML frequency divider ,why not just use the cml buffer? The cml buffer/amp with/without inductor peaking works well in millimeter-wave frequencies,if the signal path is much less than the wave length.
PA is used to delivery a requirement power to a certain impedance load,so some impedance transfer need to be done for giving a big power to the load with on-chip low vdd limited. that is ,I think, you needn't a PA here.
For very high freqency vco, the CML frequency divider will not work well(I suppose a CML DFF is used).You can try to use Injection Locking divider,which can work almost as fast as your vco.