The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Mixed-Signal Design >> switch sizing in switch capacitor circuit
https://designers-guide.org/forum/YaBB.pl?num=1204797849

Message started by min on Mar 6^th, 2008, 2:04am

Title: switch sizing in switch capacitor circuit
Post by min on Mar 6^th, 2008, 2:04am

Hi ,

I am studing switch capacitor integrator. and I am curious about how to size the complementary switch.

the clock frequency is 12.5MHz.

is there any reference?

any help will be appreciated. thanks

Min

Title: Re: switch sizing in switch capacitor circuit
Post by ywguo on Mar 6^th, 2008, 6:59am

Hi,

The on resistor of the switch, either a complementary switch or NOT, is in series with a capacitor (or a parasitic capacitor). Thus it introduces a zero. So try to minimize the on resistance and make the zero high enough so that it doesn't affect the response of the switched capacitory integrator. In other words, make the circuitry work as if the switch is ideal.

Normally the response should be decided by the opamp GWB, so make the zero much higher than the GBW.

Best regards,
Yawei

Title: Re: switch sizing in switch capacitor circuit
Post by min on Mar 9^th, 2008, 5:38pm

Hi,

I know that the complementary switch on resistor is vary with the operation

region. Then how I can determine the on resistance.

Min

Title: Re: switch sizing in switch capacitor circuit
Post by ywguo on Mar 9^th, 2008, 10:56pm

Hi,

Sure the on-resistance of the switch varies with the input voltage. However, it doesn't varies in several orders. :) Just make the on-resistance low enough so that the variation cannot affect the transient/frequency response. In another word, make the largest on-resistance low enough.

Best regards,
Yawei

Title: Re: switch sizing in switch capacitor circuit
Post by thechopper on Mar 10^th, 2008, 4:31am

Hi min,

In other words, from what Yawei suggested...
Make the largest on resistance (which will depend on the switches input CM) low enough in order to guarantee the sampled signal will settle to its final value within the width of your clock pulse. This will guarantee negligible effects on the frequency domain too.

Regards
Tosei

Title: Re: switch sizing in switch capacitor circuit
Post by loose-electron on Mar 14^th, 2008, 10:59pm

you tend to play the switch size, and its worst case on resistance,
against the charge injection of the switch,
against the size of the capacitor.

three things interacting...

You need a big enough capacitor that second order effects of charge injection are negligible. Large capacitor for a fixed switch size reduces noise effects due to charge injection.

If thermal noise is an issue, this introduces a fourth variable. Bigger capacitor make for a lower inherent noise in the system for the same pole placements, because large C means lower R (or lower I, depending on architecture) and thus differnet noise.

Title: Re: switch sizing in switch capacitor circuit
Post by min on Mar 26^th, 2008, 10:25pm

Hi:

thanks for your reply. and I have thought another unstanding of making the switch size.

I can use the capacitor transfering the electric charge to judge the size of the switch. that is I = c*V/tsettle. this current might be the average current. and I can calculate the maximum current. using the maximum current (switch in linear region) , I can set the switch size .

I am not sure about this. what do you think of this?

Min

Title: Re: switch sizing in switch capacitor circuit
Post by aamar on Mar 27^th, 2008, 5:06am

Hallo Min,

Is it your question, How to simulate(evaluate) the Resistane of a switch?

best regards,

aamar

Title: Re: switch sizing in switch capacitor circuit
Post by Berti on Mar 27^th, 2008, 6:22am

Hi Mim,

Hmmm, I think you don't care about the maximum current spike through the switch. You only care
about the settling behavior.
I think that Yawai gave the right explanation:

Quote:

The on resistor of the switch, either a complementary switch or NOT, is in series with a capacitor (or a parasitic capacitor). Thus it introduces a zero. So try to minimize the on resistance and make the zero high enough so that it doesn't affect the response of the switched capacitory integrator. In other words, make the circuitry work as if the switch is ideal.

Regards

Title: Re: switch sizing in switch capacitor circuit
Post by thechopper on Mar 27^th, 2008, 6:27am

Hi min,

As for settling time I would just consider the Ron*C time constant of your switch-cap cap combination. Make sure the time the clock sets the switch ON is larger than at least 6-7 time constants so that the final value is reached with negligible errors.

Tosei