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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> ncelab: *W,BIGWBS https://designers-guide.org/forum/YaBB.pl?num=1205321251 Message started by helix on Mar 12th, 2008, 4:27am |
Title: ncelab: *W,BIGWBS Post by helix on Mar 12th, 2008, 4:27am I am a newbie with NCSim. I tried to elaborate a Verilog design with ncelab and this warning message was produced: ncelab: *W,BIGWBS (<design_file.v>,1140|38): bit-select index truncation. I tried "nchelp ncelab BIGWBS" and it gave the following info: The index in a bit-select has a width greater than a machine word, which is typically 32 bits. Only 32 bits are used. This truncation may result in undesired behavior. Has Anyone come across this before? Is it because of somthing wrong with my codes? Is there any way to solve/get ride of/bypass this warning except using the "-NOWARN" OPTION? Thanks |
Title: Re: ncelab: *W,BIGWBS Post by Geoffrey_Coram on Mar 12th, 2008, 10:45am Have you looked at the line in question? I think a bit-select is like indexing an array, eg mybus[x], and it sounds like the warning says that "x" is somehow a variable with a width > 32. I'd go check that bit-select. |
Title: Re: ncelab: *W,BIGWBS Post by helix on Mar 12th, 2008, 7:30pm Thanks for the info. :) |
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