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Design Languages >> Verilog-AMS >> Verilog-A to C Compiler
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Message started by rajdeep on Mar 18^th, 2008, 10:08pm

Title: Verilog-A to C Compiler
Post by rajdeep on Mar 18^th, 2008, 10:08pm

Hi all,

Is there any free version of a compiler that translates Verilog-A to C?
If any please let me know.

Thanks in advance,
Rajdeep

Title: Re: Verilog-A to C Compiler
Post by Geoffrey_Coram on Mar 19^th, 2008, 6:00am

There's a SourceForge project "ADMS" that converts Verilog-A to XML and then to C. The XML to C part requires you to have a special script that defines the API for the simulator you're expecting to link to. There's a free simulator "zspice" that is supposed to work with ADMS, I forget if you have to install it also or if ADMS comes with that script; if ADMS has the script, then you could generate the C output if that's all you wanted, and not link it into zspice.

http://sourceforge.net/projects/mot-adms/

Title: Re: Verilog-A to C Compiler
Post by Marq Kole on Mar 19^th, 2008, 2:03pm

ADMS is geared towards compact modelling and will not understand all Verilog-A constructs, though. If I recall correctly, it does not support events other than the global events (initial_step and final_step). But correct me if I'm mistaken...

Cheers,
Marq

Title: Re: Verilog-A to C Compiler
Post by Geoffrey_Coram on Mar 20^th, 2008, 6:17am

Of course, Rajdeep didn't say anything about why he wants the compiler. If you want events to be handled, then you must have some plan to incorporate the output in a simulator, and you'd better get the Verilog-A compiler that generates object files for your simulator. And, of course, ADMS is open-source, so you're free to add support for whatever you want. :)

My guess was that he was interested in taking, say, the Verilog-A code for a compact model and converting it to C, with begin/end changed to braces, etc.