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https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> pll simulation using phase domain models https://designers-guide.org/forum/YaBB.pl?num=1206954216 Message started by chenyan on Mar 31st, 2008, 2:03am |
Title: pll simulation using phase domain models Post by chenyan on Mar 31st, 2008, 2:03am Hi all, I am new to verilog-A simulation of pll. When I read Ken's "Predicting the phase noise and jitter of pll-based frequency synthesizers", in the VCO model Theta(out)<+2*'M_PI*gain*idt(V(in)) So here the Theta(out) will increase infinitely unless V(in) is zero, then small signal simulatoin doesnot work, how can I solve this problem? Another question is, I converted all the simulated block phase noise (dBc/Hz) into "power" by 10^(L/10) and then input them into noise table, is that the right way to do it? Thanks a lot chenyan |
Title: Re: pll simulation using phase domain models Post by pancho_hideboo on Mar 31st, 2008, 7:39am rfmems wrote on Mar 31st, 2008, 2:03am:
Use "idtmod()". rfmems wrote on Mar 31st, 2008, 2:03am:
Maybe it works. |
Title: Re: pll simulation using phase domain models Post by chenyan on Apr 1st, 2008, 12:10am Thanks a lot! pancho_hideboo. Yes, I think idtmod will work, but we have to do pss+pnoise right? And we will use again 2 frequencies, one reference and one vco. But Ken mentioned with phase domain models, using only small signal simulation like AC or noise will do. Would there be an alternative way to do so? |
Title: Re: pll simulation using phase domain models Post by pancho_hideboo on Apr 1st, 2008, 12:41am rfmems wrote on Apr 1st, 2008, 12:10am:
Although I don't know what you like to do, the following might be helpful. $CDS_INST_DIR/tools/dfII/samples/artist/rfLib/osc Do you understand phase model and voltage model ? |
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