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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Question for PLL examples in Verilog-AMS https://designers-guide.org/forum/YaBB.pl?num=1207632119 Message started by tuyettrinh on Apr 7th, 2008, 10:21pm |
Title: Question for PLL examples in Verilog-AMS Post by tuyettrinh on Apr 7th, 2008, 10:21pm Hi there, I just download an example for PLL code in Verilog-AMS from this website, but none of PLL's module (cp, fd, vco, ...) works. For example, the compiler complains about reg, always, assign ... are future reserved keyword. I am using SpectreHDL compile. Please let me know if I am using a wrong compiler. Thanks a lot. |
Title: Re: Question for PLL examples in Verilog-AMS Post by Marq Kole on Apr 8th, 2008, 2:39am Hi, Spectre will not be usable with this PLL model, you will need to use AMS Designer as that is the mixed-signal tool. Spectre would allow Verilog-A models -- using the analog subset of Verilog-AMS -- but it does not support the digital and mixed-signal parts that the PLL model uses. reg, always, and assign are keywords from digital Verilog that Spectre does not know how to use. AMS Designer will have no problems with these. Cheers, Marq |
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