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Design >> Analog Design >> The gain of the error amplifier in DC/DC regulator
https://designers-guide.org/forum/YaBB.pl?num=1209521753

Message started by dandelion on Apr 29^th, 2008, 7:15pm

Title: The gain of the error amplifier in DC/DC regulator
Post by dandelion on Apr 29^th, 2008, 7:15pm

Hi,
In DC-DC regulator design, there is always an error amplifier to monitor the ofset voltage. So the gain of the error amplifier is high in many products. I noticed many of them is above 65dB in typ, even some of them is high up to 90dB above in typ.

But my deisgn can only provide 55dB in typ, 40dB in WCS. I know the high gain will bring high precison. I wonder if there is any other risks in it?

Thanks

Title: Re: The gain of the error amplifier in DC/DC regul
Post by Berti on Apr 30^th, 2008, 12:13am

I think that battery rejection can be an issue. High gain and bandwidth in the error amplifier increases the
battery rejection.

Regards

Title: Re: The gain of the error amplifier in DC/DC regul
Post by thechopper on May 1^st, 2008, 10:53am

I agree with Berti. In addition the regulator output impedance is another thing to consider. The higher the gain and bandwidth the smaller the output resistance from DC to higher frequencies. This is desirable in order to avoid load noise rejection.

Regards
Tosei