The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> questions about  SHA
https://designers-guide.org/forum/YaBB.pl?num=1209914021

Message started by icguy on May 4th, 2008, 8:13am

Title: questions about  SHA
Post by icguy on May 4th, 2008, 8:13am

In my Project, A 10 bits 100MHz Sample and hold amplifier  need to be done; I just don't  know how to figure out the DC Gain ,Unity Gain BandWidth of the OTA ,   anybody konow sth about this ?  tks!

Title: Re: questions about  SHA
Post by bananawolf on May 4th, 2008, 12:40pm

My initial guess is the opamp DC gain>70dB and the SHA should have a closed-loop bandwidth>350MHz.

Title: Re: questions about  SHA
Post by thechopper on May 4th, 2008, 4:15pm

Hi,

The loop gain has to be at least 60dB in order to fulfill the 10 bit resolution requirement. Therefore, the opamp DC gain has to be larger than 60dB: as large as the (DC) closed loop gain + 60dB at least.

Concerning the BW, it is important to guarantee the holding caps get the final value within the sampling time. Thus, both the RC associated to the sampling circuit and the amplifier have to be much faster than the sampling time: actually 99.999% of the final value has to be guaranteed in order to meet the 10 bit resolution. From this number you can derive the number of time constants fitting in the sampling period and afterwards the bandwidth for both circuits.

Hope this helps
Tosei

Title: Re: questions about  SHA
Post by icguy on May 4th, 2008, 7:19pm

Tosei  Tks for your reply

should the DC Gain be calculated as follow ?     DC Gain > 20log10(2^10)+20log(1/f)  f=feedback factor

I can Understand Rc Associated to the sample circuits, it is  a Transistor-on resistance and sampling capacitance;Yet Ican't

understand RC of the amplifier you mentioned above . In addition, why the settling time accuracy is 99.999%(or 0.001%),some papers

just take 0.1% or 0.01%, Can the  settling accuracy arbitrarily  chosen? I am totally confused.

Title: Re: questions about  SHA
Post by sheldon on May 5th, 2008, 8:15am

ICguy,

  You may wish to add more margin to the DC gain calculation, usually
you try to keep the systematic errors small, ~0.25lsb or less. Since you
have assumed that the settling is purely due to RC-settling, it is not
unreasonable to include additional margin. The other option would be
to include the effect of slew rate in the settling time calculation.

                                                                   Best Regards,

                                                                      Sheldon  

Title: Re: questions about  SHA
Post by thechopper on May 5th, 2008, 6:35pm


icguy wrote on May 4th, 2008, 7:19pm:
should the DC Gain be calculated as follow ?     DC Gain > 20log10(2^10)+20log(1/f)  f=feedback factor


Yes, that would be the min acceptable value for your amp gain.

[/quote]

I can Understand Rc Associated to the sample circuits, it is  a Transistor-on resistance and sampling capacitance;Yet Ican't

understand RC of the amplifier you mentioned above . In addition, why the settling time accuracy is 99.999%(or 0.001%),some papers

just take 0.1% or 0.01%, Can the settling accuracy arbitrarily  chosen? I am totally confused.[/quote]


From the small signal perspective, if the opamp had a BW much smaller than the RC time constant, it might not be able to respond fast enough in order to force the desired voltage across the sampling cap, simply because it could not provide enough current to it. Therefore the amp BW should be such that a fair number of time constants (9 may be) fit within the sampling time.

Sheldon also brought up a good point about slew rate, which is a large signal condition that your opamp will have to meet, apart from the ones mentioned above.

Hope this is a little bit more clear.
Regards
Tosei

Title: Re: questions about  SHA
Post by Berti on May 5th, 2008, 10:24pm

Just an additional comment on DC-gain:

OpAmp non-linearity will cause distortion. Therefore, OpAmp gain often has to be larger
to keep the harmonics small enough.

Cheers

Title: Re: questions about  SHA
Post by icguy on May 7th, 2008, 7:18am

To get some intuitive understanding ,I first designed an opamp with 240MHz Gain Band Width and 78 degree Phase Margin and 85dB DC gain ;

My opamp consists two stage, the first stage is telescopic and the secong stage is a commom source output;

step response is simulated  in Spectre. the attachment is the  simulation result. from the figure we can see that slewing period is comparable to

the settling period. do i have to do sth to supress the slewing period? or leave it alone and  just to  improve the opamp'GBW to get a better

settling ?

tks again

Title: Re: questions about  SHA
Post by Berti on May 7th, 2008, 10:32pm

To me this settling curve doesn't look so nice because of the ringing. I think you have to be careful when using two-stage
amplifiers because the pole-zero doublet from the Miller compensation can cause ringing in the step response.

Cheers

The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.