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Design Languages >> Verilog-AMS >> Idiot's Guide to mixed-mode verilog?
https://designers-guide.org/forum/YaBB.pl?num=1211921122

Message started by joel on May 27^th, 2008, 1:45pm

Title: Idiot's Guide to mixed-mode verilog?
Post by joel on May 27^th, 2008, 1:45pm

Hi All,
I need to learn how to write a functional model for an analog-front-end core of a larger chip. It's a random assortment of op-amps, PGAs, LPF & HPFs, equalizers, S/H & max/min detectors, etc. The model will be used in an verilog digital regression environment, getting its input stream directly from files of real numbers.

I'm a decent spice & verilogD hacker, and I can do floating-point emulations of simple analog stuff in verilogD. But I've never used the analog side. Where do I start to educate myself? I'm not even sure of the difference between verilogA and verilogAMS. Is verilogA an historical term now, superceeded by verilogAMS?

I could probably get my company to send me to a training class where I could enjoy some of Cadence's excellent meals, but I would prefer not to commit a week away from my desk to this effort.

A general question, I know... But I appreciate any advice you could give me. Cheers!

Title: Re: Idiot's Guide to mixed-mode verilog?
Post by joel on May 27^th, 2008, 1:58pm

Ah, I see a post 3 threads down that makes some useful suggestions. Thanks! /jd