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Simulators >> Circuit Simulators >> How many parameters of PLL system can be simulated
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Message started by icsoul on May 29^th, 2008, 5:21am

Title: How many parameters of PLL system can be simulated
Post by icsoul on May 29^th, 2008, 5:21am

How many parameters of PLL system can be simulated on earth?

In behavior and transister level.

1. the lock range
2. the lock time
3. the pull in range
4. the pull in range
5. the pull out range
6. the hold range
7. the loop bandwidth
8. the close loop bandwidth
9. the phase noise
10. the jitter
11. the nature frequency
12. the damping factor
13. the vco noise transfer curve of the whole pll system
14. the input noise transfer curve o the whole pll system
etc.

What I mean is to simulate the whole pll system to get the parameters, and is NOT to simulate the building blocks and calculate these parameters.

Maybe some parameters can be simulated, while the others cannot be. Give your opinions and methods.

Welcome to discuss~

Title: Re: How many parameters of PLL system can be simul
Post by buddypoor on May 29^th, 2008, 1:29pm

Up to now, I succeeded in simulating 1-8, 11,12 and in addition: phase error, demodulation properties.

Title: Re: How many parameters of PLL system can be simul
Post by David Lee on May 30^th, 2008, 12:37am

buddypoor wrote on May 29^th, 2008, 1:29pm:

Up to now, I succeeded in simulating 1-8, 11,12 and in addition: phase error, demodulation properties.

I'm happy to say that with transient noise, all the remaining parameters on your list
9 - PLL phase noise
10 - PLL jitter
13, 14 - PLL noise transfer
can be simulated at the transistor level.

Title: Re: How many parameters of PLL system can be simul
Post by icsoul on May 30^th, 2008, 2:00am

Hi, David Lee and buddypoor

Could you please introduce the simulation method in detail?

Thanks~!

Title: Re: How many parameters of PLL system can be simul
Post by buddypoor on May 30^th, 2008, 3:11am

I must confess, up to now I have simulated the mentioned PLL parametrs on block level only (using the software VISSIM, which - for my opinion - is very handsome and powerful)

Each simulation was based purely on the parameter definition. For example to measure pull-in time and pull-in range I did nothing else than to apply two different frequnecies and watch the VCO control signal. As soon as it settles the pull-in process has ended. The same applies to all ac measurements, which are valid only in the locked state.
Therefore, I´ve used the linear model with phase as inputs.

A detailed description seems to be very large in space.
Regards

Title: Re: How many parameters of PLL system can be simul
Post by David Lee on May 31^st, 2008, 11:40pm

icsoul wrote on May 30^th, 2008, 2:00am:

Hi, David Lee and buddypoor

Could you please introduce the simulation method in detail?

Thanks~!

I have simulated several frac-N and integer-N PLLs at the transistor level using Berkeley Design Automation's Analog FastSpice. Its transient noise analysis models transistor noise as current sources with random values based on the noise intensity information from the device model. By injecting this random noise for each device noise source at each timestep during transient simulation, it produces output waveforms that include realistic noise effects.

Title: Re: How many parameters of PLL system can be simul
Post by icsoul on Jun 3^rd, 2008, 3:59am

David Lee wrote on May 31^st, 2008, 11:40pm:

icsoul wrote on May 30^th, 2008, 2:00am:

Hi, David Lee and buddypoor

Could you please introduce the simulation method in detail?

Thanks~!

David Lee

Could you introduce how to simulate the PLL loopbandwidth and noise character as a whole system?

Title: Re: How many parameters of PLL system can be simul
Post by joel on Jun 17^th, 2008, 5:01pm

For loop bandwidth, modulate your reference clock at some frequency, and measure the corresponding output frequency modulation. Sweep the modulation frequency. When the normalized output frequency modulation amplitude is down by 3dB relative to normalized input modulation amplitude, you've got your 3dB loop bandwidth. Basically when you can see it start to attenuate, you're roughly at the loop bandwidth.

By the way, I've had good luck using Evercad Adit for PLLs because it has a retriggering measure statement. E.g. For each posedge, measure the time till the next. Do any other circuit simulators have this? I'm not aware if it in hspice or hsim, but they're constantly adding freatures. Cheers! /jd

Title: Re: How many parameters of PLL system can be simul
Post by icsoul on Jun 19^th, 2008, 2:47am

joel wrote on Jun 17^th, 2008, 5:01pm:

Thanks, joel

I have done the simulation like your method a few days ago. But it is very slow. Do you have any better method?

What't your mean about retriggering measure statement? Do you mean that it can measure at every edge with one measure command?

It seems has no this feature in HSPIECE as I know.

Title: Re: How many parameters of PLL system can be simul
Post by joel on Jun 19^th, 2008, 11:27pm

>Do you mean that it can measure at every edge with one measure command?

Yes, that's what the function does. I find it very useful. Otherwise I have to generate a bunch of measures with a perl script, but having a thousand measures is slow to process.

>slow... Do you have a better method?

I think a high speed/capacity circuit-simulator like adit or hsim can run out 20uS of PLL simulation in an hour or two. You just have to initialize the VCO control voltage to something reasonable. This is the transient simulation 'real-world' approach.

Otherwise, you can solve it analytically with matlab or pencil & paper. The loop bandwidth is supposed to be around 4 times the unity-gain frequency, which is defined in the text books. I haven't made an effort to correlate my transient simulation results with analytical results, but I hope someone out there has!