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Design Languages >> Verilog-AMS >> questions on transition filter
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Message started by veriloganewbie on Jun 13^th, 2008, 11:42am

Title: questions on transition filter
Post by veriloganewbie on Jun 13^th, 2008, 11:42am

I was using transition filters for the outputs of my model to give them a more analog look.
However, when simulating this model, Cadence was having some convergence problems when the output was connected to an ideal current load.

I had to get rid of the transition filter in order to have any simulation results, but the output now looks very digital

Does any of you have any idea what's happening??

Title: Re: questions on transition filter
Post by Ken Kundert on Jun 13^th, 2008, 1:45pm

Perhaps you should show us the model that is causing you trouble.

-Ken

Title: Re: questions on transition filter
Post by veriloganewbie on Jun 13^th, 2008, 4:27pm

a current pulse and a cap of 3nF are connected to the output vddcore, where vddcore1_20, vddcore2_25, and vddcore3_25 are connected together.

vddcore1_20 provides a maximum current of 20mA, vddcore2_25 and vddcore3_25 provide maximum of 25 mA.

I(vddcore1_20) <+ transition( (deep_pd_off * ( V(vddcore1_20) - vint )/res_vddcore1_20), td, tr) ;
I(vddcore2_25) <+ transition(deep_pd_off * ( V(vddcore2_25) - vint )/ res_vddcore2_25), td, tr);
I(vddcore3_25) <+ transition( (deep_pd_off * ( V(vddcore3_25) - vint )/ res_vddcore3_25),td, tr);

deep_pd_off is 0 during deep power mode, where there is no current outflowing.
res_vddcore1_20, res_vddcore2_25, and res_vddcore3_25 are static resisitve values

If all three of these outputs use the transition filter, the simulator will an unsettling voltage output as if the model did not exist.

And are there any filters or functions that can smooth out the outputs other than transition or absdelay?

Title: Re: questions on transition filter
Post by Ken Kundert on Jun 13^th, 2008, 11:17pm

The first argument to a transition function must be piecewise constant. As such, you should pull the voltage out. Rewrite them to be something like ...

I(vddcore1_20) <+ (V(vddcore1_20) - vint )*transition( (deep_pd_off /res_vddcore1_20), td, tr) ;

Also, you seem to have current sources driving a capacitor. That will not have a dc solution. You will need to specify an initial condition on the capacitor or tell the simulator to skip dc.

-Ken

Title: Re: questions on transition filter
Post by veriloganewbie on Jun 16^th, 2008, 11:56am

Ken Kundert wrote on Jun 13^th, 2008, 11:17pm:

Thanks for your reply. The transient simulation works now.
However, the voltage output does seem to be having any rising time, so the output still isn't very smooth. Do you have any idea what I shall do?

Title: Re: questions on transition filter
Post by Ken Kundert on Jun 16^th, 2008, 6:28pm

Kind of depends on what is happening. Can you give us a picture?

-Ken

Title: Re: questions on transition filter
Post by veriloganewbie on Jun 17^th, 2008, 4:11pm

Ken Kundert wrote on Jun 16^th, 2008, 6:28pm:

Kind of depends on what is happening. Can you give us a picture?

-Ken

For some reason i can't post the waveform
But basically, the results are the same with or without using the transition filter
The model is ignoring the rise/fall time.

Title: Re: questions on transition filter
Post by Ken Kundert on Jun 17^th, 2008, 7:03pm

Well, perhaps you could post the model?

Title: Re: questions on transition filter
Post by veriloganewbie on Jun 19^th, 2008, 4:04pm

Thank you for all your help. The model has lots of inputs and outputs and here are some of them, so let's see if we can discover something. In this model, input vddd determines the value of an internal voltage source vsup. I would like to make vsup follow vddd after vddd passes a certain threshold, and make vsup stay at 1.8V when vddd >= 1.8

parameter real vddd_min = 1.2;
parameter real vsupmax = 1.8;
parameter real imax5 = 5m;
parameter real imax20 = 20m;
parameter real imax25 = 25m;
parameter real vdropmax = 200m;
parameter real tdelay = 100n;

analog begin
@ (initial_step("ac","tran","dc","xf")) begin
vint = 0;
I(vddcore1_20) <+ -50n;
I(vddcore2_25) <+ -50n;
I(vddcore3_25) <+ -50n;
I(vdda_5) <+ -50n;

deep_pd_off = 0;

end

if (V(vddd) < vddd_min)
vsup = 0;
else begin
if (V(vddd) < vsupmax)
vsup = V(vddd);
else
vsup = vsupmax;
end
res_vddcore1_20 = vdropmax / imax20;
res_vddcore2_25 = vdropmax / imax25;
res_vddcore3_25 = vdropmax/ imax25;
res_vdda_5 = vdropmax/ imax5;

I(vddcore1_20) <+ deep_pd_off * ( V(vddcore1_20) - vint ) * transition( (1 /res_vddcore1_20), td, tr) ;
I(vddcore2_25) <+ deep_pd_off * ( V(vddcore2_25) - vint ) * transition( (1 / res_vddcore2_25), td, tr);
I(vddcore3_25) <+ deep_pd_off * ( V(vddcore3_25) - vint ) * transition( (1 / res_vddcore3_25) td, tr);

Title: Re: questions on transition filter
Post by Ken Kundert on Jun 19^th, 2008, 4:30pm

deep_pd_off ?? What is that? How is it declared? Is it piecewise constant? If so, it should be inside the transition function.
You probably also need a cross function to resolve the time of the threshold crossings on V(vddd). Do you really want hysteresis?

Your attempts to simplify this problem are making it much harder for us to help you. It would be best if you came up with a simple complete model that exhibited the problem, and they gave that. If you had done that from the first, you would have had your answer days ago, and I would not have to repeatedly ask you for more information.

-Ken

Title: Re: questions on transition filter
Post by Geoffrey_Coram on Jun 20^th, 2008, 8:10am

veriloganewbie wrote on Jun 19^th, 2008, 4:04pm:

I(vddcore1_20) <+ deep_pd_off * ( V(vddcore1_20) - vint ) * transition( (1 /res_vddcore1_20), td, tr) ;

As Ken noted, deep_pd_off should probably be inside the transition -- right now, the argument to the transition filter:
1/res_vddcore1_20
is constant, so transition() does nothing!

I think you want
I(vddcore1_20) <+ ( V(vddcore1_20) - vint )/res_vddcore1_20 * transition( deep_pd_off, td, tr) ;