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Measurements >> Phase Noise and Jitter Measurements >> difference between phase noise testing and simulation
https://designers-guide.org/forum/YaBB.pl?num=1217903628

Message started by xuel on Aug 4^th, 2008, 7:33pm

Title: difference between phase noise testing and simulation
Post by xuel on Aug 4^th, 2008, 7:33pm

In simulation the phasenoise is very good, is 100dbc at 1MHz.
But in testing, phasenoise is only 60dbc at 1MHz.
But the jitter is not large, 20ps peak-to-peak measured from oscilloscope.
Why is the measured phasenoise so bad?

Title: Re: difference between phase noise testing and simulation
Post by luantan on Aug 10^th, 2008, 8:37am

anybody knows? :)

Title: Re: difference between phase noise testing and simulation
Post by ACWWong on Aug 11^th, 2008, 12:30am

I'm assuming your simulation gives -100dBc/Hz

In such a case your measurement shows about -95dBc/Hz at 1MHz offset.
That is -60dBc in a 3kHz RBW, so you need to adjust the marker by 10*logRBW=34.8 dB.

Often the analyser has the marker on noise function which will take into account the RBW automatically (and more accurately).

So in fact you are 5 to 6 dB of where you expect to be. The reasons for this can be many e.g. discrepenacy in models, simulation setup issues, measurement issues, PCB design, noise pickup etc.....

Title: Re: difference between phase noise testing and simulation
Post by iaman on Sep 12^th, 2008, 8:32am

ACWWong wrote on Aug 11^th, 2008, 12:30am:

Great.
from the test picture, we can find some details:
1. RBW is 3kHz, so we should normilized the PN to dBm/Hz.
2. the Spectrum analiyzer power dector is peak dector , you should change the power dector to rms dector.
2.

Title: Re: difference between phase noise testing and simulation
Post by kriyang on Sep 15^th, 2008, 12:53am

The phase noise at higher offset frequencies is generally limited to thermal or white noise floor of your load. If you are using a resistive load you should expect higher noise floor.