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Design >> Mixed-Signal Design >> a guide for designing digital FIR filters
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Message started by vivkr on Aug 28^th, 2008, 4:39am

Title: a guide for designing digital FIR filters
Post by vivkr on Aug 28^th, 2008, 4:39am

Hi,

I have never designed digital filters so far (although I did study a bit of DSP at school). I was looking for a good reference that gives the necessary basics to design practical, power-efficient digital filters. Would anyone be able to recommend some papers? I already have the regular DSP books, but they are not very useful in these things.

Hint: The main application would be decimation filtering for delta-sigma ADCs, and power consumption is naturally critical.

Thanks,
Vivek

Title: Re: a guide for designing digital FIR filters
Post by buddypoor on Aug 28^th, 2008, 5:06am

Hi vivek,
instead of basic DSP books I recommend "Filter Books" which are more based on practical aspects. Example: Taylor, "Electronic Filter Design Handbook" (McGraw Hill).

Since I have a chapter on digital filters from S. Lam at hand I attache it as a pdf file; perhaps it helps.
Regards and good luck
buddypoor

Title: Re: a guide for designing digital FIR filters
Post by buddypoor on Aug 28^th, 2008, 6:03am

Hi vivek,

As I have made an error (I did attach only the introduction chapter), I have tried to post the main chapters on digital filters, however, the files are to large (> 1000 kb) for posting it in this forum.
If you are interested, give me your e-mail adress and I could send you these chapters separately (pdf with app 6 Mb).
Regards

Title: Re: a guide for designing digital FIR filters
Post by email_gz on Aug 28^th, 2008, 7:13pm

Hello Vivek :
For decimation filtering for delta-sigma ADCs, R. Jacob Baker's <<CMOS: Mixed-Signal Circuit Design, Second Edition>> is a good book. Many DSP book also have the theory of Sinc and halfband filter.
For low power consumption:
1: choose the right order of filter and coefficient.
2: the logic architecture of filter: topology of pipeline(dff vs latch), how many adders and multipliers and their bits needed.
3: arithmetic operation block logic design choice:
adder: carry ripple/select/look-ahead ... adder?
multiplier: csa tree , wallace tree, booth encoder, fused multiply-Add......?
4: transistor circuit map:
combinational circuit: CMOS logic, CPL, CVSL, clock and power gating....
DFF/Latch: Maste-slave dff, pulse latch, TSPC, Strong-ARM DFF,Semidynamic DFF, logic fused dff/latch....
A very good book for circuit and logic design, Neil H. E. Weste, D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, 3th Edition, Pearson Education Press.
Hope helpful!

**********************************************************
Hi,

I have never designed digital filters so far (although I did study a bit of DSP at school). I was looking for a good reference that gives the necessary basics to design practical, power-efficient digital filters. Would anyone be able to recommend some papers? I already have the regular DSP books, but they are not very useful in these things.

Hint: The main application would be decimation filtering for delta-sigma ADCs, and power consumption is naturally critical.

Thanks,
Vivek

Title: Re: a guide for designing digital FIR filters
Post by vivkr on Aug 28^th, 2008, 11:59pm

buddypoor wrote on Aug 28^th, 2008, 6:03am:

Thanks a lot. I am sending you my email address through a PM. Will have to wait to
read all those interesting chapters though as I am out the next few days.

Regards,

Vivek