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Other CAD Tools >> Physical Verification, Extraction and Analysis >> how to avoid extracting RFMOS in Calibre PEX?
https://designers-guide.org/forum/YaBB.pl?num=1221038883

Message started by jlee on Sep 10^th, 2008, 2:28am

Title: how to avoid extracting RFMOS in Calibre PEX?
Post by jlee on Sep 10^th, 2008, 2:28am

To avoid extracting RFMOS parasitics in Calibre PEX, I used hcell file and gate level extraction type.

Here is my hcell file:

rfnmos1v nmosrf

After extraction, I found following warnings.

1) Warning: Hcell rfnmos1v not located or not allowed.

2) Warning: Name "rfnmos1v" in hcell correspondence file not found in layout - ignored".

In RVE, net parasitics shows that parasitics has still be extracted.

I don't know how to solve this problem. Could you please give me some suggestions?

Thanks in advance!

Jason

Title: Re: how to avoid extracting RFMOS in Calibre PEX?
Post by ywguo on Sep 11^th, 2008, 3:03am

Hi Jason,

It seems that the Calibre xRC had not find the cell named rfnmos1v.

Yawei

Title: Re: how to avoid extracting RFMOS in Calibre PEX?
Post by jlee on Sep 13^th, 2008, 12:13am

Thanks for your input.

What ahout my hcell file? Is it right?

Which one should follow the name in layout, the former or the latter?

Title: Re: how to avoid extracting RFMOS in Calibre PEX?
Post by ywguo on Sep 23^rd, 2008, 1:18am

I think the former should follow the layout view name, and the latter for schematic view. -- Yawei

Title: Re: how to avoid extracting RFMOS in Calibre PEX?
Post by ywguo on Oct 30^th, 2008, 2:28am

Hi Jason,

In the hcell file from a Big foundry, the first column contains the sub-circuit name for the RF devices; the second column contains the LVS model name defined in the LVS command file. I extracted a small layout with this file successfully.

I looked at the Calibre manual for 2004 and 2007. It states that the first column is layout name and the second column is source name. I don't know which one is correct now. Maybe both are correct.

Yawei