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Design >> Analog Design >> Help! --- Voltage Limiting Circuit Topology
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Message started by skythunder on Oct 14^th, 2008, 7:13pm

Title: Help! --- Voltage Limiting Circuit Topology
Post by skythunder on Oct 14^th, 2008, 7:13pm

Hi,

I want to find a circuit structure to realize voltage limiting purpose.
It works in power-line communication. Sometimes the input signal amplitude after amplification is too large, which will make the modualor overloaded. So I want to limit the amplified signal to some amplitude level. Can anyone give me some advice?

I think limiting amp or using diode are solutions, but I don't know how to realize in CMOS Integrated circuits? Please help!

Thanks