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https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> pnoise analysis https://designers-guide.org/forum/YaBB.pl?num=1224685059 Message started by vasu_lonka on Oct 22nd, 2008, 7:17am |
Title: pnoise analysis Post by vasu_lonka on Oct 22nd, 2008, 7:17am hi, i have done pnoise analysis using spectre on a sample and hold circuit( nmos used as the switch) . I have used a sampling frequency of 625KHz and signal frequency of 62.5KHz. Hold capacitor value is 14.5pF, which shuold give a total integrated noise power of 300p (kT/c). i used a maximum sideband value of 200. The thing Iam confused with is that if we choose stop frequency equal to 312.5KHz(fs/2), the total integrated noise is much less than kT/c . At the same time if we choose stop frequency equal to 1GHz the total integrated noise at the output equals the kT/c noise. Even though we used the maximum sideband options, we still need to integrate till very high frequencies. Can anyone please tell me why it is like this ? |
Title: Re: pnoise analysis Post by Frank Wiedmann on Oct 22nd, 2008, 7:55am If you look at figure 4 of http://www.designers-guide.org/Analysis/sc-filters.pdf, which is for a sampling frequency of 400 kHz, you can see that there is significant noise above this frequency. These results match the formulas derived in this paper. |
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