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https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> The cdd parameter in BSIM3v3 model https://designers-guide.org/forum/YaBB.pl?num=1227176435 Message started by ywguo on Nov 20th, 2008, 2:20am |
Title: The cdd parameter in BSIM3v3 model Post by ywguo on Nov 20th, 2008, 2:20am Hi Guys, The parameter cdd is defined as dQd_dVd (Intrinsic part of Cdd) (alias=lx33). Now I want to measure the parasitic capacitance at the drain of one MOS transistor. The simulation bench is shown in this post. A voltage source is applied to the drain of one NMOS transistor. A DC analysis is run. The parameter cdd is about 29 fF in the printed DC operating points of that NMOS. An AC analysis is run, too. Then I calculate the total parasitic capacitance at the drain based on the small signal impedance. The result is about 58 fF. The detailed formula is I(V0)/V(V0)=omega * Cd. What's wrong with my analysis? Thank you in advance Yawei |
Title: Re: The cdd parameter in BSIM3v3 model Post by Geoffrey_Coram on Nov 20th, 2008, 10:12am Cdd I think only includes the channel capacitance -- no diode/depletion cap from B-D junction and no overlap capacitance. |
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