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Design Languages >> Verilog-AMS >> ESD protection devices models
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Message started by Dracon on Nov 22^nd, 2008, 5:46am

Title: ESD protection devices models
Post by Dracon on Nov 22^nd, 2008, 5:46am

Dear All,

I have been trying to model ESD devices in Verilog-A and came across some problems with hspice convergence failure for some values of technologie parameters like diode built-n junction potential for example.
I don't understand that, maybe there is because in protection devices characteristics have some discontinuities of some kind?

Does anyone have any idea how to model esd diode based on ieee article:
Compact Modeling of On-Chip ESD Protection Devices Using Verilog-A
Junjun Li, Student Member, IEEE, Sopan Joshi, Member, IEEE, Ryan Barnes, and Elyse Rosenbaum, Senior Member, IEEE

Thanks and best regards