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Design Languages >> Verilog-AMS >> Truly bidirectional ideal transformer in Verilog-A
https://designers-guide.org/forum/YaBB.pl?num=1227781802

Message started by gmork_0 on Nov 27^th, 2008, 2:30am

Title: Truly bidirectional ideal transformer in Verilog-A
Post by gmork_0 on Nov 27^th, 2008, 2:30am

Hi,

In Spectre, there is an ideal transformer component (called transformer). This one is "truly" bidirectional - one can force the current or voltage (connect ideal current or voltage source) to either primary or secondary winding.

i just wondered, if such a component can be written in Verilog-A as well.My best try was:

module idealTransformer(pLeft, nLeft, pRight, nRight);
parameter real ratio = 2 from (0:inf);

inout pLeft, nLeft, pRight, nRight;
electrical pLeft, nLeft, pRight, nRight;

analog begin
V(pRight,nRight) <+ ratio*V(pLeft, nLeft);
I(pLeft,nLeft) <+ -ratio*I(pRight, nRight);
end
endmodule

,what works fine for real loading of ports. However, one cannot e.g. connect the ideal voltage source to the pRight, nRight ports.

Thanks for comments,

Miro

Title: Re: Truly bidirectional ideal transformer in Verilog-A
Post by Geoffrey_Coram on Dec 3^rd, 2008, 5:34am

I replaced your V line with an indirect assignment:

V(pRight,nRight) : V(pRight,nRight) == ratio*V(pLeft, nLeft);

and it seems to work with a v-source on either side.