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Design >> Mixed-Signal Design >> Low to High Voltage Level Shifter
https://designers-guide.org/forum/YaBB.pl?num=1228427857

Message started by wave on Dec 4^th, 2008, 1:57pm

Title: Low to High Voltage Level Shifter
Post by wave on Dec 4^th, 2008, 1:57pm

Hello - Can anyone suggest good architectures (papers?) of Logic Level shifters.

I need a low voltage (say 1V) shifted to a higher voltage (variable, 3-10V) range. I have various oxide devices and Vt flavors.

One complicating issue is, the lower supply may fall away and the output should remain in state. ie, latched.

Once we have a latching mechanism, a 2nd issues is the condition on startup. It needs a skew or POR, perhaps.

Finally, I cannot tolerate DC current in either high or low state.

One idea is a cross coupled NOR gate, like an R/S latch.

thanks for your comments.
~WAVE :P

Title: Re: Low to High Voltage Level Shifter
Post by rf-design on Dec 15^th, 2008, 2:59pm

The crosscoupled PMOS with NMOS driven from 1V-logic works only if the gate could withstand 10V. That is rare to my knowledge.

If the the high voltage logic is e.g. between 10V and 7.5V made of thick-oxide with isolated NMOS then the latch must be current controlled from the 1V-0V-logic.

The latch could have a normal asynchron reset.

Is the voltage like above? What process you use?

Title: Re: Low to High Voltage Level Shifter
Post by wave on Dec 15^th, 2008, 3:18pm

rf-design wrote on Dec 15^th, 2008, 2:59pm:

In this case, I do actually have 10V xters to run the latch off of.

However, this is also a general problem with multiple supplies.
I know some guys have to level shift 1.8 to 3V, using dual gate Oxide transistor. Or 1V to 2.5V, etc.

regards,
Wave