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The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> PLL vs. DLL for Clock Generation? https://designers-guide.org/forum/YaBB.pl?num=1228514575 Message started by loose-electron on Dec 5th, 2008, 2:02pm |
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Title: PLL vs. DLL for Clock Generation? Post by loose-electron on Dec 5th, 2008, 2:02pm Having done a lot of PLL designs, I tend to stick with PLL's to do timing generation (frequency multiplication, sub dividing a clocking signal etc.) However - from everyone's experience, what are the pro/con of using a DLL vs. PLL in these applications? |
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Title: Re: PLL vs. DLL for Clock Generation? Post by loose-electron on Dec 15th, 2008, 10:09am Still interested in this topic. Anybody done both? |
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Title: Re: PLL vs. DLL for Clock Generation? Post by rf-design on Dec 15th, 2008, 2:33pm You need some thrown arguments. Relative frequency range Inductor allowed Settling time Special analog devices avaible Tight subphases needed Jitter or phase noise requierment Supply rejection Area Design time Risk versus $M mask cost |
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Title: Re: PLL vs. DLL for Clock Generation? Post by loose-electron on Dec 17th, 2008, 2:58pm For timing acquisition in a clock and data recovery system, not a mixer, so we are talking ring oscillators here, not LC-VCO's. No inductors, and generic CMOS processes, underneath 5GHz. rf-design wrote on Dec 15th, 2008, 2:33pm:
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