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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> PLL design https://designers-guide.org/forum/YaBB.pl?num=1228891826 Message started by raja.cedt on Dec 9th, 2008, 10:50pm |
Title: PLL design Post by raja.cedt on Dec 9th, 2008, 10:50pm hi, i am designing a PLL,in that how to select loop filter elementc1 which is in series with zero providing resistor.some where i read it depends on the charge pump leakage current and mismatch between up and down current sources. but i didn't understood much.If any body have any design example documents that would be great help to me . Thank you. |
Title: Re: PLL design Post by DaveB on Jan 4th, 2009, 6:44pm A pretty good, free reference on PLL design is from National Semiconductor, Here is the link http://www.national.com/analog/timing/pll_designbook Read through that, and you'll have a much better understanding of Loop filter design Dave |
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