The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Modeling >> Semiconductor Devices >> n+ polysilicon gates
https://designers-guide.org/forum/YaBB.pl?num=1231223011

Message started by Berti on Jan 5^th, 2009, 10:23pm

Title: n+ polysilicon gates
Post by Berti on Jan 5^th, 2009, 10:23pm

Dear all,

What is the reason (and difference in processing steps) that older technologies had pMOS devices with n+ polysilicon gates (buried channel) while newer technologies use pMOS with p+ polysilicon gates?

Thanks!

Title: Re: n+ polysilicon gates
Post by vivkr on Jan 6^th, 2009, 2:05am

Hi Berti,

The older technologies has thicker poly for the gate. Supposedly, this made harder to use implant techniques to dope them, and so they were doped during the poly deposition process, and so all were the same type (n+).

With newer processes, it became possible to dope the thinner poly with implant and anneal methods.

Just Googled on buried channel pmos, and found the info on this link:

http://ece.iisc.ernet.in/~navakant/E3-238/lecture13.pdf

Regards,

Vivek

Title: Re: n+ polysilicon gates
Post by Berti on Jan 6^th, 2009, 3:44am

Thank a lot. So far I understand. But what is the motivation that buried channels are avoided in newer technologies? Is it the counter-doping required for PMOS with p+ polysilicon gates? Cost or mobility?

Regards

Title: Re: n+ polysilicon gates
Post by vivkr on Jan 6^th, 2009, 11:30pm

Hi Berti,

If you look at the link I sent in the earlier post, you will see the reason.

In short, the counter doping which leads to formation of buried channels was an extra step which was necessary in the older technologies to achieve a reasonable (small) level of threshold voltage. This was due to the flatband voltage which results when using an n+ poly-Si gate for a PMOS.

In the new processes where it is possible to have a p+ gate for PMOS, the flatband voltage is much better and there is no need for the extra step which was responsible for buried channel formation in PMOS. In fact, I doubt if you could actually achieve anything with counter doping anymore. It was the large amount of counterdoping required in older processes which led to formation of buried channels.

So, it is not that the modern processes avoid buried channels per se, but more that the older processes could produce nothing but buried channels due to the use of an n+ gate for both PMOS and NMOS.

Regards,

Vivek

Title: Re: n+ polysilicon gates
Post by vivkr on Jan 7^th, 2009, 4:31am

Hi Berti,

One interesting thing seems to be the argument behind why it was not possible to get anything but only n+ gates earlier for both PMOS and NMOS.

The argument that the thicker poly could not be doped well with implant techniques is not quite clear. Maybe someone else can tell us why it was not possible to dope thicker poly gates with implant and anneal methods like we do nowadays.

Perhaps there was a change in the way the poly was deposited also.

Anyone???

Regards,

Vivek

Title: Re: n+ polysilicon gates
Post by Maks on Jan 23^rd, 2009, 12:25pm

Berti -

buried channel devices are avoided in modern technologies due to poor short-channel effects (as compared to surface channel devices), caused by 2D electrostatics. This was not an issue in old technologies with long channel/gate lengths, where short channel effects were non-existent.

Buried channel devices have their own advantages - higher mobility (due to lower normal electric field and lower surface carrier scattering), lower noise (carriers are less interacting with traps/defects at the Si/SiO2 interface), lower NBTI degradation for pMOS, etc.

Extra implant step for buried channel devices is not an issue - all modern MOSFETs have this extra implant step that is used to adjust
Vt - threshold voltage.

Maks
------------

Title: Re: n+ polysilicon gates
Post by Tlaloc on Jan 27^th, 2009, 8:14pm

I also know that the n+ on the PMOS exacerbated DIBL effects as the channel lengths became smaller. Having the dual implants for the poly gates removed helped with that effect in the PMOS's