The Designer's Guide Community Forum https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> Bulk and Interface Traps https://designers-guide.org/forum/YaBB.pl?num=1231446302 Message started by littlenasboy on Jan 8th, 2009, 12:25pm

Title: Bulk and Interface Traps Post by littlenasboy on Jan 8th, 2009, 12:25pm How does one model the effect of bulk and interface traps on the DCIV characteristics of a MOS device?

The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved.