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Design Languages >> Verilog-AMS >> Variable capacitor...
https://designers-guide.org/forum/YaBB.pl?num=1232119527

Message started by Seario on Jan 16^th, 2009, 7:25am

Title: Variable capacitor...
Post by Seario on Jan 16^th, 2009, 7:25am

Hello I'm new in this Verilog-A design world. And I'm here asking for your help. The program chose a capacitance value which depends of the initial voltage, at the beginning of this I had plenty of problems with the ddt function, reading some manuals such as varactor of this page I fix this problem (or at least I want to think that) . The problem is that I am not sure of the simulation result, can you please give some advice...

The codes for Verilog-A and spice are below...

`include "discipline.h"

module capvar(p,n);
inout p,n;
electrical p,n;

branch (p,n) cap;

// Parameters used in hysteresis part
parameter real p1=1.272e-7;
parameter real p2=-1.168e-6;
parameter real p3=7.633e-5;
parameter real p4=1.202e-5;
parameter real p5=0.000176;
parameter integer vt=15;

real Vd, cvar, cvar2, c, deriv;

analog
begin
Vd = V(p,n);
cvar =(1/3)*p1*pow(Vd,3) +(1/2)* p2*pow(Vd,2) + p3*Vd;
cvar2=(1/2)*p4*pow(Vd,2) + p5*Vd;

if (Vd < vt)
begin
c = cvar;
end
else
begin
c = cvar2;
end

deriv = ddt(c*Vd);

I(cap) <+ deriv;

end
endmodule

I'm using smartspice to run Verilog-A

.verilog "prueba01.va"

* Initial source voltage
Vg p 0 pulse (0V 25V 0 10n 10n 10n 100n)

* Function inside
YVLGVAR p n capvar

* Load resistor between the node and GND
R1 n 0 1M

* Sweep analysis
.tran 5n 900n

*Debug thing
*.options va_mode=debug

* Shows results
.print I(p,n) @YVLGVAR[I(p,n)]
.print V(r1) V(Vg)

.end

So, can you give me some feedback or what should I read or do, thanks :-[
Seario

Title: Re: Variable capacitor...
Post by Geoffrey_Coram on Jan 19^th, 2009, 9:45am

I'm rather concerned about the abrupt change in "c" when Vd crosses vt. In a well-constructed model, cvar and cvar2 would be equal at Vd==vt, and also their derivatives would match there. I think it's rather non-physical if they don't.

Title: Re: Variable capacitor...
Post by Ken Kundert on Jan 19^th, 2009, 10:57am

The model also will not conserve charge. You should compute charge and then apply ddt() to that. The idea that you compute capacitance, multiply it by voltage, and then apply ddt() is wrong when the capacitor is nonlinear.

-Ken

Title: Re: Variable capacitor...
Post by Geoffrey_Coram on Jan 20^th, 2009, 7:35am

Oops, I missed that -- at least it wasn't c*ddt(v), but Ken's right that q of a nonlinear capacitor is not c*v, but rather the integral of c with respect to v.

Title: Re: Variable capacitor...
Post by Seario on Jan 28^th, 2009, 8:57am

Hello Ken and Geoffrey thank you for your kind replay.

The equations shown are already integrated in order to conserve charge. The abrupt change in capacitance values is needed in my work. Also, modify the equation as last suggestion says...

Thank you for your help.
Mario A. :)