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Design >> Analog Design >> Maximize the beta of bipolar transistor in CMOS technology
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Message started by neoflash on Jan 19^th, 2009, 10:26pm

Title: Maximize the beta of bipolar transistor in CMOS technology
Post by neoflash on Jan 19^th, 2009, 10:26pm

β of the planar bipolar transistors is a big headache of the modern CMOS technology.

Accoring to the principle theory, β is a function of base area width. Is there any paper/book report any tricks for maximizing the β with layout optimization?

Title: Re: Maximize the beta of bipolar transistor in CMOS technology
Post by Tlaloc on Jan 27^th, 2009, 3:16pm

I always thought that β was a function of the base thickness, not the surface area. With that assumption, you couldn't do much in layout.

Unless you are talking about lateral bjt's. Then the thickness dimension is affected by layout.

The problem is that bjt models are notoriously non-scalable, which means that you need a separate model for every layout. Without testchips, you would really know the performance of your custom layout before your chip taped out.

Title: Re: Maximize the beta of bipolar transistor in CMOS technology
Post by thechopper on Jan 29^th, 2009, 5:40pm

I agree with Tlaloc.
Unless you think of lateral bjt's, there is not much you can do by playing layout tricks.

To be more accurate β is a function of the base charge which, geometrically can be controlled by properly sizing the thickness of the bjt base. But certainly other knob that could touched is the base charge concentration. By changing the amount of charge for a fixed thickness you could also play with β.
That would be another way to customize your bjt, but certainly Tlaloc comments on models non-scalablilty will play a role here too.
Test chip will be the way to go as he suggested....

Hope this helps
Tosei

Title: Re: Maximize the beta of bipolar transistor in CMOS technology
Post by loose-electron on Feb 1^st, 2009, 12:38pm

Thats why its a CMOS process not a bipolar or Bi-CMOS process. CMOS processes have the lateral PNP available, which is good enough for doing a band-gap but not much beyond that. (there are some papers out there that make wider use of the device, but thats another story)

The CMOS bipolar is never going to be a good performer due to the lateral nature of the device. Vertical bipolars are always going to be a better beta.