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Design Languages >> Verilog-AMS >> strobing data to a file using Verilog-A (parameterizing the file)
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Message started by vivkr on Jan 20^th, 2009, 3:48am

Title: strobing data to a file using Verilog-A (parameterizing the file)
Post by vivkr on Jan 20^th, 2009, 3:48am

Hi All,

I see the forum is for Verilog-AMS but I hope that Verilog-A questions are also relevant here.

I am trying to use a Verilog-A block to strobe out some signals to a file. I would like to be able to define the destination file when I instantiate the Verilog-A strobe block, and not have it hard-coded. How can I do this?

I tried to define the filename as a string parameter

parameter string myoutfile

But this gives me a syntax error. The compiler says that this is not allowed without specifying why. With spectreHDL, this was never an issue, but the simulator I am using does not support it and I need to write the function in Verilog-A.

I would be glad to have any tips.

Thanks,

Vivek

Title: Re: strobing data to a file using Verilog-A (parameterizing the file)
Post by Geoffrey_Coram on Jan 20^th, 2009, 7:37am

string parameters were added in LRM2.2, and some simulators haven't fully implemented that LRM, never mind that it was approved in 2004 and LRM 2.3 is now available.

Title: Re: strobing data to a file using Verilog-A (parameterizing the file)
Post by Andrew Beckett on Jan 20^th, 2009, 7:48am

With VerilogA in spectre, this is supported - although you have to miss out the keyword "string":

Code:

parameter data_file = "random_static";

There's a CCR 352942 asking for full support based on the LRM. Please contact Cadence customer support and ask them to file a CCR as a duplicate of this - the more this gets asked for, the higher priority it will get.

Regards,

Andrew.

Title: Re: strobing data to a file using Verilog-A (parameterizing the file)
Post by vivkr on Jan 22^nd, 2009, 1:05am

Dear Andrew,

Thanks a lot. That solves my problem nicely.

Regards,

Vivek